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[1/3] drm/i915/bxt: Use PHY0 GRC value for HW state verification

Message ID 1461174366-16758-2-git-send-email-imre.deak@intel.com (mailing list archive)
State New, archived
Headers show

Commit Message

Imre Deak April 20, 2016, 5:46 p.m. UTC
It's possible that BIOS enables PHY1 only to read out the GRC value from
it to be used in PHY0 and then disables PHY1. In this case we can't use
the PHY1 GRC value for state verification, so use instead the one in PHY0
always.

Signed-off-by: Imre Deak <imre.deak@intel.com>
---
 drivers/gpu/drm/i915/intel_ddi.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)
diff mbox

Patch

diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c
index c2348fb..943aa93 100644
--- a/drivers/gpu/drm/i915/intel_ddi.c
+++ b/drivers/gpu/drm/i915/intel_ddi.c
@@ -1770,7 +1770,7 @@  static void broxton_phy_init(struct drm_i915_private *dev_priv,
 		DRM_DEBUG_DRIVER("DDI PHY %d already enabled, "
 				 "won't reprogram it\n", phy);
 		/* Still read out the GRC value for state verification */
-		if (phy == DPIO_PHY1)
+		if (phy == DPIO_PHY0)
 			dev_priv->bxt_phy_grc = broxton_get_grc(dev_priv, phy);
 
 		return;