From patchwork Wed Apr 20 18:42:12 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chris Wilson X-Patchwork-Id: 8894051 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id E67CDBF29F for ; Wed, 20 Apr 2016 18:43:00 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 07D612025A for ; Wed, 20 Apr 2016 18:43:00 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id 351CA20121 for ; Wed, 20 Apr 2016 18:42:59 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 92C5A6EAD3; Wed, 20 Apr 2016 18:42:55 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mail-wm0-x244.google.com (mail-wm0-x244.google.com [IPv6:2a00:1450:400c:c09::244]) by gabe.freedesktop.org (Postfix) with ESMTPS id 4F0DE6EACE for ; Wed, 20 Apr 2016 18:42:42 +0000 (UTC) Received: by mail-wm0-x244.google.com with SMTP id l6so16110889wml.3 for ; Wed, 20 Apr 2016 11:42:42 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references; bh=Hwtn6vqngONtdjBMPvzhn5SigYg+6dWEiyOWwRGtRzo=; b=RGTV1/mK95w0L5FhxmlGeuDcAYPkQWyAKZ8acLCCTZJgMiIjFXnr+H48Fo3jOhkyZH A7Sjl6818ihXYFljXmBzgqTpJi9JYr9AElO35HteWou+oLXuQfiHpmJdbxUW8MrlRfg6 xLQqbOSyuoPRSsaIGcZ/uDTtTAWXJUhDX+nnRa9cjd4darRkU81e/d2w88/TBddQ1Zab DEO0C8Vz3yTYKGPFQF781hOQacHgLHR0XW1AGvWyuu/zOjvv5NoFu6ozplj8g9DK9uFF JJfnh6EBUL+gNkd1YcTeKYio1KRhSft5TjOO7pXvMo11we7+2T4VUs17a7J/pgZRXoPW qXYw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references; bh=Hwtn6vqngONtdjBMPvzhn5SigYg+6dWEiyOWwRGtRzo=; b=G1uXYFh/h/ouqwIhk2O9Re92QhycyQlp/9kfNYQmLH6jZTIkQCQvirZD/yeOkAwjXO snKOcNvdRkcx/1OV42f0GNHXPsWFXvMAeoqcJd+NAB1acqy/MShp4FCpXuZsNDvmj/Nb QSN1E12tRSxCaI7D5x0fL4C6RwIR88gXyTcYD2mlhEfuhlJStTisFOCTn6MZ4W5XceFn jXzqusUbppCpDbpkeSHKk53+hb15bNRvlOfiYBgbK6E6IUcBx3H5AtH4XpO6j8Vr7NUB 4JlERSLodqlwrYe6iHDLcXNdtFy0STTLTFT/lV4kyKJX4NkpMiCo7rhuIMF8c4K+cT+n e7jw== X-Gm-Message-State: AOPr4FWEBzD2tFYFAPYYIXOkAWCREFMGbl35xTkn8JGWS499Ft5dZxo1sT7giIJxHEiEkg== X-Received: by 10.28.213.142 with SMTP id m136mr11276821wmg.24.1461177760847; Wed, 20 Apr 2016 11:42:40 -0700 (PDT) Received: from haswell.alporthouse.com ([78.156.65.138]) by smtp.gmail.com with ESMTPSA id f8sm6934510wjm.13.2016.04.20.11.42.39 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Wed, 20 Apr 2016 11:42:39 -0700 (PDT) From: Chris Wilson To: intel-gfx@lists.freedesktop.org Date: Wed, 20 Apr 2016 19:42:12 +0100 Message-Id: <1461177750-20187-2-git-send-email-chris@chris-wilson.co.uk> X-Mailer: git-send-email 2.8.1 In-Reply-To: <1461177750-20187-1-git-send-email-chris@chris-wilson.co.uk> References: <1461177750-20187-1-git-send-email-chris@chris-wilson.co.uk> Subject: [Intel-gfx] [PATCH 01/19] drm/i915/overlay: Replace i915_gem_obj_ggtt_offset() with the known flip_addr X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Spam-Status: No, score=-5.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_MED,RP_MATCHES_RCVD,T_DKIM_INVALID,UNPARSEABLE_RELAY autolearn=ham version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP When setting up the overlay page, we pin it into the GGTT (when using virtual addresses) and store the offset as overlay->flip_addr. Rather than doing a lookup of the GGTT address everytime, we can use the known address instead. Signed-off-by: Chris Wilson Cc: Tvrtko Ursulin Reviewed-by: Tvrtko Ursulin --- drivers/gpu/drm/i915/intel_overlay.c | 9 +++------ 1 file changed, 3 insertions(+), 6 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_overlay.c b/drivers/gpu/drm/i915/intel_overlay.c index bcc3b6a016d8..9746b9841c13 100644 --- a/drivers/gpu/drm/i915/intel_overlay.c +++ b/drivers/gpu/drm/i915/intel_overlay.c @@ -198,7 +198,7 @@ intel_overlay_map_regs(struct intel_overlay *overlay) regs = (struct overlay_registers __iomem *)overlay->reg_bo->phys_handle->vaddr; else regs = io_mapping_map_wc(ggtt->mappable, - i915_gem_obj_ggtt_offset(overlay->reg_bo)); + overlay->flip_addr); return regs; } @@ -1493,7 +1493,7 @@ intel_overlay_map_regs_atomic(struct intel_overlay *overlay) overlay->reg_bo->phys_handle->vaddr; else regs = io_mapping_map_atomic_wc(ggtt->mappable, - i915_gem_obj_ggtt_offset(overlay->reg_bo)); + overlay->flip_addr); return regs; } @@ -1523,10 +1523,7 @@ intel_overlay_capture_error_state(struct drm_device *dev) error->dovsta = I915_READ(DOVSTA); error->isr = I915_READ(ISR); - if (OVERLAY_NEEDS_PHYSICAL(overlay->dev)) - error->base = (__force long)overlay->reg_bo->phys_handle->vaddr; - else - error->base = i915_gem_obj_ggtt_offset(overlay->reg_bo); + error->base = overlay->flip_addr; regs = intel_overlay_map_regs_atomic(overlay); if (!regs)