From patchwork Thu Apr 21 08:58:50 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chris Wilson X-Patchwork-Id: 8897451 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id CF355BF440 for ; Thu, 21 Apr 2016 08:59:33 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id E98D620211 for ; Thu, 21 Apr 2016 08:59:32 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id C3554202FE for ; Thu, 21 Apr 2016 08:59:31 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 9B90A6EC21; Thu, 21 Apr 2016 08:59:28 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mail-wm0-x243.google.com (mail-wm0-x243.google.com [IPv6:2a00:1450:400c:c09::243]) by gabe.freedesktop.org (Postfix) with ESMTPS id 85BA76EC14 for ; Thu, 21 Apr 2016 08:59:26 +0000 (UTC) Received: by mail-wm0-x243.google.com with SMTP id n3so19911099wmn.1 for ; Thu, 21 Apr 2016 01:59:26 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=sender:from:to:subject:date:message-id; bh=Hwtn6vqngONtdjBMPvzhn5SigYg+6dWEiyOWwRGtRzo=; b=V2tbX0WO02HJItYS1MnLmIgnYywTCZW20tTBe2ypWzKUifPgpegH3b0mSYeiEr82Fx Y0sVGYdbNgn9EUaTdbRtTHWDmQrPsW/d8wWquLqkqQTMHN2uuc0840Spn1+g3Svxmssk oze6Xrl+IXREpuG62Vd/QwRd9ZrbFHPXkkR+TYIImlnNe/KkgDGTXEEDr4OSLLnyeXII tAVhqBb1lzJcA8rFAc9AgMAz5eo2uT1kSnO5b8gWFlUEvrLvh5EXY0Yqcxx48u3ao5B6 NJdmWk/l37MgISdQpjIBRei9yecOBOqQ3VHjgddKP1fdbDpDNKTxqx0FF6q3o0O0g22A HFig== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:sender:from:to:subject:date:message-id; bh=Hwtn6vqngONtdjBMPvzhn5SigYg+6dWEiyOWwRGtRzo=; b=FERA4K0WBILLSJurp3WI7GLERAmOHq3UGs7AVSofKX3DB5jJeOybX8GtauB3JlAnig gozb/lBNBKzeMADiGAmPg61+E9hQut1I911nws+ySnfuux/R3l5JtKR7YJk+5R+NJ28K nGEKmkOviwSmp5aUgJZswBq0OTqoEoHWELCh1PHmgXR01TZCQi7RC60KG4yVmQPTxPDY GOUco63M2A+JfsIytkcpXgYOpjx4w+Tsh81N3J6w7SxMjziPRhk4OD78rX5kXx1pzfae 0U2U116iwR8vR2bxpFabc8ypLjmBVB+z1rwI552WoGyfmsey+HojW6Aigi8PozQRNX1y XsyQ== X-Gm-Message-State: AOPr4FW6W+7v9ciELn7F7BCLTVFN1Fzx6YoBXno6zDQFFGZpZ8VtedkkvAs2LAIYDOBMLw== X-Received: by 10.28.130.6 with SMTP id e6mr14682963wmd.94.1461229164904; Thu, 21 Apr 2016 01:59:24 -0700 (PDT) Received: from haswell.alporthouse.com ([78.156.65.138]) by smtp.gmail.com with ESMTPSA id wa1sm1710773wjc.45.2016.04.21.01.59.23 for (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 21 Apr 2016 01:59:23 -0700 (PDT) From: Chris Wilson To: intel-gfx@lists.freedesktop.org Date: Thu, 21 Apr 2016 09:58:50 +0100 Message-Id: <1461229148-2939-1-git-send-email-chris@chris-wilson.co.uk> X-Mailer: git-send-email 2.8.1 Subject: [Intel-gfx] [PATCH 01/19] drm/i915/overlay: Replace i915_gem_obj_ggtt_offset() with the known flip_addr X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Spam-Status: No, score=-5.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_MED,RP_MATCHES_RCVD,T_DKIM_INVALID,UNPARSEABLE_RELAY autolearn=ham version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP When setting up the overlay page, we pin it into the GGTT (when using virtual addresses) and store the offset as overlay->flip_addr. Rather than doing a lookup of the GGTT address everytime, we can use the known address instead. Signed-off-by: Chris Wilson Cc: Tvrtko Ursulin Reviewed-by: Tvrtko Ursulin --- drivers/gpu/drm/i915/intel_overlay.c | 9 +++------ 1 file changed, 3 insertions(+), 6 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_overlay.c b/drivers/gpu/drm/i915/intel_overlay.c index bcc3b6a016d8..9746b9841c13 100644 --- a/drivers/gpu/drm/i915/intel_overlay.c +++ b/drivers/gpu/drm/i915/intel_overlay.c @@ -198,7 +198,7 @@ intel_overlay_map_regs(struct intel_overlay *overlay) regs = (struct overlay_registers __iomem *)overlay->reg_bo->phys_handle->vaddr; else regs = io_mapping_map_wc(ggtt->mappable, - i915_gem_obj_ggtt_offset(overlay->reg_bo)); + overlay->flip_addr); return regs; } @@ -1493,7 +1493,7 @@ intel_overlay_map_regs_atomic(struct intel_overlay *overlay) overlay->reg_bo->phys_handle->vaddr; else regs = io_mapping_map_atomic_wc(ggtt->mappable, - i915_gem_obj_ggtt_offset(overlay->reg_bo)); + overlay->flip_addr); return regs; } @@ -1523,10 +1523,7 @@ intel_overlay_capture_error_state(struct drm_device *dev) error->dovsta = I915_READ(DOVSTA); error->isr = I915_READ(ISR); - if (OVERLAY_NEEDS_PHYSICAL(overlay->dev)) - error->base = (__force long)overlay->reg_bo->phys_handle->vaddr; - else - error->base = i915_gem_obj_ggtt_offset(overlay->reg_bo); + error->base = overlay->flip_addr; regs = intel_overlay_map_regs_atomic(overlay); if (!regs)