From patchwork Thu Apr 21 14:57:22 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chris Wilson X-Patchwork-Id: 8901581 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 75ACF9F457 for ; Thu, 21 Apr 2016 14:59:48 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 74780202E9 for ; Thu, 21 Apr 2016 14:59:47 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id 8946F20295 for ; Thu, 21 Apr 2016 14:59:46 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 360756ECE5; Thu, 21 Apr 2016 14:59:43 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mail-wm0-x241.google.com (mail-wm0-x241.google.com [IPv6:2a00:1450:400c:c09::241]) by gabe.freedesktop.org (Postfix) with ESMTPS id 88AE06ECE7 for ; Thu, 21 Apr 2016 14:57:52 +0000 (UTC) Received: by mail-wm0-x241.google.com with SMTP id l6so22144516wml.3 for ; Thu, 21 Apr 2016 07:57:52 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=sender:from:to:subject:date:message-id:in-reply-to:references; bh=4Gi0kkwMN+DTzt91jRSzQPr2vQ4jKY8bZxsuJLRfQjY=; b=sPdGmRMCaRUk+t8UzHuu9b/p2463ZYT35LT1MFqIzcUWquKsySh9MuIag7aGLfyGtJ 5ia2u7izWmqen3JTrY/tsGWJ29OHtAaeZ2eAJI0NB5DBFiyRR6+Asdl9yEQQ9SC3xgLY LMQiNzb266HASzE9feUhqCJ5rbEBNVI9IXy2ayi4M4r7yNzljlbb8JRSt3U7qfnn3IXH JOEGkucwnbTC+cWoxdvRERK0Krjx1Dk5akS40mnpHjsUmPUu1sAbNIBgRJ111OjafcOO v8t4XH5NWYilgC/X9iCMdOL/M7Co0ZTK2DzmqfPBlcPRr5orD7e3GCo57EZTBxn0PDB7 0gfQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:sender:from:to:subject:date:message-id :in-reply-to:references; bh=4Gi0kkwMN+DTzt91jRSzQPr2vQ4jKY8bZxsuJLRfQjY=; b=hkD7wp7TH49DjTA9EKSe0tiyV/Sl6krkfrVYrWI+3zO7rMmXEy620wiEIzM02wEcBe kVjdAi67kXBXENtCxxy9f/j2bcm+OjZyubdRdsk54dt+ri2sLg+HXi41g6VASMtaV3jR diMaYWvbzpxAMyFw1lsUQqjfSg7yTSo+JVncVcl/eWnYbiQe3920ucUx9oAjFbE2IYnT c1BuwamVT1upBCG8vPZWSjdBpn4RQCHEerAcpqDNUfrlayJPQl0WN5fIwW91gqeOc02v eXv5+Z/2i0lS6K2a0GwyDAoFdH09voateTrz/Si0s340fWWAI9bowzuxdNQ3Be31BUha 3ISQ== X-Gm-Message-State: AOPr4FUuHB1qS1N8epnXG3ZQSU05WJFH5PoPIqI+6mDdw+Sf2k4xBjKsH2xTWFKKjRPFaQ== X-Received: by 10.28.187.5 with SMTP id l5mr15136537wmf.17.1461250670532; Thu, 21 Apr 2016 07:57:50 -0700 (PDT) Received: from haswell.alporthouse.com ([78.156.65.138]) by smtp.gmail.com with ESMTPSA id by7sm3261506wjc.18.2016.04.21.07.57.49 for (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 21 Apr 2016 07:57:49 -0700 (PDT) From: Chris Wilson To: intel-gfx@lists.freedesktop.org Date: Thu, 21 Apr 2016 15:57:22 +0100 Message-Id: <1461250647-7738-15-git-send-email-chris@chris-wilson.co.uk> X-Mailer: git-send-email 2.8.1 In-Reply-To: <1461250647-7738-1-git-send-email-chris@chris-wilson.co.uk> References: <1461250647-7738-1-git-send-email-chris@chris-wilson.co.uk> Subject: [Intel-gfx] [PATCH 14/19] drm/i915: Move context initialisation to first-use X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Spam-Status: No, score=-5.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_MED,RP_MATCHES_RCVD,T_DKIM_INVALID,UNPARSEABLE_RELAY autolearn=ham version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Instead of allocating a new request when allocating a context, use the request that initiated the allocation to emit the context initialisation. This serves two purposes, it makes the initialisation atomic with first use (simplifying scheduling and our own error handling). Secondly, it enables us to remove the explicit context allocation required by higher levels of GEM and make that property of execlists opaque (in the next patch). There is also a minor step forwards towards convergence of legacy/execlist contexts. Signed-off-by: Chris Wilson Reviewed-by: Joonas Lahtinen --- drivers/gpu/drm/i915/i915_drv.h | 1 + drivers/gpu/drm/i915/intel_lrc.c | 49 +++++++++++++++++++++++----------------- 2 files changed, 29 insertions(+), 21 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index 2bf3a8f97d52..e4b510bcee62 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -868,6 +868,7 @@ struct intel_context { struct i915_vma *lrc_vma; u64 lrc_desc; uint32_t *lrc_reg_state; + bool initialised; } engine[I915_NUM_ENGINES]; struct list_head link; diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c index 838abd4b42a3..eeb8be695288 100644 --- a/drivers/gpu/drm/i915/intel_lrc.c +++ b/drivers/gpu/drm/i915/intel_lrc.c @@ -672,9 +672,10 @@ static int execlists_move_to_gpu(struct drm_i915_gem_request *req, int intel_logical_ring_alloc_request_extras(struct drm_i915_gem_request *request) { - int ret = 0; + struct intel_engine_cs *engine = request->engine; + int ret; - request->ringbuf = request->ctx->engine[request->engine->id].ringbuf; + request->ringbuf = request->ctx->engine[engine->id].ringbuf; if (i915.enable_guc_submission) { /* @@ -689,7 +690,30 @@ int intel_logical_ring_alloc_request_extras(struct drm_i915_gem_request *request return ret; } - return intel_lr_context_pin(request->ctx, request->engine); + ret = intel_lr_context_pin(request->ctx, engine); + if (ret) + return ret; + + if (!request->ctx->engine[engine->id].initialised) { + ret = engine->init_context(request); + if (ret) + goto err_unpin; + + request->ctx->engine[engine->id].initialised = true; + } + + /* Note that after this point, we have committed to using + * this request as it is being used to both track the + * state of engine initialisation and liveness of the + * golden renderstate above. Think twice before you try + * to cancel/unwind this request now. + */ + + return 0; + +err_unpin: + intel_lr_context_unpin(request->ctx, engine); + return ret; } static int logical_ring_wait_for_space(struct drm_i915_gem_request *req, @@ -2634,25 +2658,8 @@ int intel_lr_context_deferred_alloc(struct intel_context *ctx, ctx->engine[engine->id].ringbuf = ringbuf; ctx->engine[engine->id].state = ctx_obj; + ctx->engine[engine->id].initialised = engine->init_context == NULL; - if (ctx != ctx->i915->kernel_context && engine->init_context) { - struct drm_i915_gem_request *req; - - req = i915_gem_request_alloc(engine, ctx); - if (IS_ERR(req)) { - ret = PTR_ERR(req); - DRM_ERROR("ring create req: %d\n", ret); - goto error_ringbuf; - } - - ret = engine->init_context(req); - i915_add_request_no_flush(req); - if (ret) { - DRM_ERROR("ring init context: %d\n", - ret); - goto error_ringbuf; - } - } return 0; error_ringbuf: