From patchwork Tue Apr 26 06:54:09 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chris Wilson X-Patchwork-Id: 8935151 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id DD08FBF29F for ; Tue, 26 Apr 2016 06:57:07 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 0A89C20142 for ; Tue, 26 Apr 2016 06:57:07 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id 3324F2012D for ; Tue, 26 Apr 2016 06:57:06 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 667636E752; Tue, 26 Apr 2016 06:56:43 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mail-wm0-x243.google.com (mail-wm0-x243.google.com [IPv6:2a00:1450:400c:c09::243]) by gabe.freedesktop.org (Postfix) with ESMTPS id 423B089704 for ; Tue, 26 Apr 2016 06:56:13 +0000 (UTC) Received: by mail-wm0-x243.google.com with SMTP id w143so1714146wmw.3 for ; Mon, 25 Apr 2016 23:56:13 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references; bh=/lx/J6US5rg6But5qPQhs3VBYaAEuOBlHVEvHJXX14E=; b=aR+xvD07kVul86tNYbzVnMXzc8fmFfGOjYBLhJAuXHM5FidSkKs62P4PHKJutYXu9P fJJ8vrVQEKiXwcrqA0WF/Q7/jebyUyezt2wiR6KRft2MrKSPAehoulVpjZlrtuQUsQPA Juce/oyqIk8X3IowoZ5WhYq4V6YBcBnT8mpy95l2G8CQUf5mif4zDYMLqkOzs8V98JmZ PiAsFMSvLKbgXnzIfNMjQLC4RUbZgSaTmyq0tdYiiYSgw9brG9FEytBDgT2gQNNhqzv/ xkjPD+CGcAs5fS9FUza3n+bhB7H6pgI51j/gXELdp7MPJf2o3dWCW4lb0nP5I5awXEH6 gbvA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references; bh=/lx/J6US5rg6But5qPQhs3VBYaAEuOBlHVEvHJXX14E=; b=EKiDOwqpO8OzCPJRaL8HMpfcBZlXeIyU6PKB3uy0UJtMgJwP/FKGctaocnlt+Mv3oy YGiWguidncytMMFxd5esNYdAQCX9SW3OG0Nghta0lSxBsrTezG67VyTSgpf5OpJDdoc6 UWnBRztN8mM3K2XD5bRJL/VCMAF/IKTPZQfCnsWTsuOA2dZNsasR9cTVNY9FfDQG21El MrZNsaUE8K6Pphc/NOs/+S4w7/CCOuBShKeoUuNhf9VLEG40oebALVubdXn6EcdTNuMt 5HmWGdmUtu7YCkmkWF8RAYikuMhKreYbhryw8odrgP0wBGF1SxKIQ+ycm3J9wmAJyedR pfQg== X-Gm-Message-State: AOPr4FXpTNx0XjXDLWUcPRUvk6S1i5V3nrGNPTVW+eAXgYqkN1UPu+rBMTB17L9UYdPALw== X-Received: by 10.28.48.203 with SMTP id w194mr1680050wmw.67.1461653771315; Mon, 25 Apr 2016 23:56:11 -0700 (PDT) Received: from haswell.alporthouse.com ([78.156.65.138]) by smtp.gmail.com with ESMTPSA id 8sm22374524wms.14.2016.04.25.23.56.09 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 25 Apr 2016 23:56:10 -0700 (PDT) From: Chris Wilson To: intel-gfx@lists.freedesktop.org Date: Tue, 26 Apr 2016 07:54:09 +0100 Message-Id: <1461653672-17335-3-git-send-email-chris@chris-wilson.co.uk> X-Mailer: git-send-email 2.8.1 In-Reply-To: <1461653672-17335-1-git-send-email-chris@chris-wilson.co.uk> References: <1461653672-17335-1-git-send-email-chris@chris-wilson.co.uk> Cc: Mika Kuoppala Subject: [Intel-gfx] [PATCH v4 02/25] drm/i915/overlay: Replace i915_gem_obj_ggtt_offset() with the known flip_addr X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Spam-Status: No, score=-5.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_MED,RP_MATCHES_RCVD,T_DKIM_INVALID,UNPARSEABLE_RELAY autolearn=ham version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP When setting up the overlay page, we pin it into the GGTT (when using virtual addresses) and store the offset as overlay->flip_addr. Rather than doing a lookup of the GGTT address everytime, we can use the known address instead. Signed-off-by: Chris Wilson Cc: Tvrtko Ursulin Reviewed-by: Tvrtko Ursulin --- drivers/gpu/drm/i915/intel_overlay.c | 9 +++------ 1 file changed, 3 insertions(+), 6 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_overlay.c b/drivers/gpu/drm/i915/intel_overlay.c index 597fbcda8c5c..06bcd6aee64f 100644 --- a/drivers/gpu/drm/i915/intel_overlay.c +++ b/drivers/gpu/drm/i915/intel_overlay.c @@ -198,7 +198,7 @@ intel_overlay_map_regs(struct intel_overlay *overlay) regs = (struct overlay_registers __iomem *)overlay->reg_bo->phys_handle->vaddr; else regs = io_mapping_map_wc(ggtt->mappable, - i915_gem_obj_ggtt_offset(overlay->reg_bo)); + overlay->flip_addr); return regs; } @@ -1493,7 +1493,7 @@ intel_overlay_map_regs_atomic(struct intel_overlay *overlay) overlay->reg_bo->phys_handle->vaddr; else regs = io_mapping_map_atomic_wc(ggtt->mappable, - i915_gem_obj_ggtt_offset(overlay->reg_bo)); + overlay->flip_addr); return regs; } @@ -1523,10 +1523,7 @@ intel_overlay_capture_error_state(struct drm_device *dev) error->dovsta = I915_READ(DOVSTA); error->isr = I915_READ(ISR); - if (OVERLAY_NEEDS_PHYSICAL(overlay->dev)) - error->base = (__force long)overlay->reg_bo->phys_handle->vaddr; - else - error->base = i915_gem_obj_ggtt_offset(overlay->reg_bo); + error->base = overlay->flip_addr; regs = intel_overlay_map_regs_atomic(overlay); if (!regs)