From patchwork Tue Apr 26 20:06:17 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chris Wilson X-Patchwork-Id: 8944351 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 13F689F441 for ; Tue, 26 Apr 2016 20:07:09 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 213E22014A for ; Tue, 26 Apr 2016 20:07:08 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id 48068201EF for ; Tue, 26 Apr 2016 20:07:06 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 8F0796E940; Tue, 26 Apr 2016 20:07:03 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mail-wm0-x241.google.com (mail-wm0-x241.google.com [IPv6:2a00:1450:400c:c09::241]) by gabe.freedesktop.org (Postfix) with ESMTPS id ADD876E945 for ; Tue, 26 Apr 2016 20:06:59 +0000 (UTC) Received: by mail-wm0-x241.google.com with SMTP id e201so7255237wme.2 for ; Tue, 26 Apr 2016 13:06:59 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references; bh=daEF96hAYi6rA5kLtWfS4jXdGRBNdqVXQSiCytwyJDs=; b=y7yekq4vLmqT2kj4XpHn+fSrLUgatDsa3qCuvoFzk58JNOEtB2qnRFX2Gp0+a/j/5T TRxQCehZ1qaXa0xik6uE9nvZX92hjQ+Zk35YOddU1GfJYEJmcvZOoJmpujoTCPXIlaJz ucpAUoXD1eRXDYOqhhHkkDrry9JgXgF0SmbFsm192qQNMFW70AlYSMCyxIP5GgTaQdv+ md/UIvRPPTrmv67AOLJp6hZ7u46HcU2yfNZErsq0PvW1PTJ1YJbZu8icI/gsPJeyS82o yprBbFD63wUhBUOWVSv9y5edUn0oreLmMs1y7hNpUwIQkweO7qyJ+99QZPVoriMB4QKw I7Qw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references; bh=daEF96hAYi6rA5kLtWfS4jXdGRBNdqVXQSiCytwyJDs=; b=etrRMMeIiGqdha0Eq+3WVN7Vo2h5D3lV94qbTDBT5NPA05wJgq3T0srlbXOEy/6mIG OK0xx7PhXftwMMVmivVa0tqP3jUOqOTaNTwPYTwGD1nSCq5NijbYZKHM+6zZPKj9+YfJ dKQMKUp/nhwp+OUQt/+MKL58LyEfXHv2f6+40EFYbyAWxEOcdph+RGvb94ZGby26uRRA OjvNi4JdseyJqTR4TScycTTJ5Y+tBEeNG5a196hlWU7Yg+wTqfZCUp9o0XER5CVxYier K+JBX3NkjywEI1/2KSlFRAR/Z0daLhYx8omHAk8305Qg+g6hrGYKFlxuMpWKLVFBPt2u pqxw== X-Gm-Message-State: AOPr4FVO9hqSGfwUHOZGqibyVEvNStB2a3eL5kWuZUh+0rYGWI2KJljQhOkqRIAYM2GYeA== X-Received: by 10.28.172.133 with SMTP id v127mr22010888wme.1.1461701217635; Tue, 26 Apr 2016 13:06:57 -0700 (PDT) Received: from haswell.alporthouse.com ([78.156.65.138]) by smtp.gmail.com with ESMTPSA id gk4sm347603wjd.7.2016.04.26.13.06.56 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 26 Apr 2016 13:06:56 -0700 (PDT) From: Chris Wilson To: intel-gfx@lists.freedesktop.org Date: Tue, 26 Apr 2016 21:06:17 +0100 Message-Id: <1461701180-895-23-git-send-email-chris@chris-wilson.co.uk> X-Mailer: git-send-email 2.8.1 In-Reply-To: <1461701180-895-1-git-send-email-chris@chris-wilson.co.uk> References: <1461701180-895-1-git-send-email-chris@chris-wilson.co.uk> Subject: [Intel-gfx] [PATCH v6 22/25] drm/i915: Track the previous pinned context inside the request X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Spam-Status: No, score=-5.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_MED,RP_MATCHES_RCVD,T_DKIM_INVALID,UNPARSEABLE_RELAY autolearn=ham version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP As the contexts are accessed by the hardware until the switch is completed to a new context, the hardware may still be writing to the context object after the breadcrumb is visible. We must not unpin/unbind/prune that object whilst still active and so we keep the previous context pinned until the following request. We can generalise the tracking we already do via the engine->last_context and move it to the request so that it works equally for execlists and GuC. v2: Drop the execlists double pin as that exposes a race inside the lrc irq handler as it tries to access the context after it may be retired. Signed-off-by: Chris Wilson Cc: Tvrtko Ursulin Reviewed-by: Joonas Lahtinen --- drivers/gpu/drm/i915/i915_drv.h | 11 +++++++++++ drivers/gpu/drm/i915/i915_gem.c | 8 ++++---- drivers/gpu/drm/i915/intel_lrc.c | 14 ++++++++------ 3 files changed, 23 insertions(+), 10 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index 0bd9d17ff974..eb4a95b853dd 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -2305,6 +2305,17 @@ struct drm_i915_gem_request { struct intel_context *ctx; struct intel_ringbuffer *ringbuf; + /** + * Context related to the previous request. + * As the contexts are accessed by the hardware until the switch is + * completed to a new context, the hardware may still be writing + * to the context object after the breadcrumb is visible. We must + * not unpin/unbind/prune that object whilst still active and so + * we keep the previous context pinned until the following (this) + * request is retired. + */ + struct intel_context *previous_context; + /** Batch buffer related to this request if any (used for error state dump only) */ struct drm_i915_gem_object *batch_obj; diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c index e4c8a8b998d1..fc68af50ed1b 100644 --- a/drivers/gpu/drm/i915/i915_gem.c +++ b/drivers/gpu/drm/i915/i915_gem.c @@ -1413,13 +1413,13 @@ static void i915_gem_request_retire(struct drm_i915_gem_request *request) list_del_init(&request->list); i915_gem_request_remove_from_client(request); - if (request->ctx) { + if (request->previous_context) { if (i915.enable_execlists) - intel_lr_context_unpin(request->ctx, request->engine); - - i915_gem_context_unreference(request->ctx); + intel_lr_context_unpin(request->previous_context, + request->engine); } + i915_gem_context_unreference(request->ctx); i915_gem_request_unreference(request); } diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c index 4be11f8d0e04..0682a79be02c 100644 --- a/drivers/gpu/drm/i915/intel_lrc.c +++ b/drivers/gpu/drm/i915/intel_lrc.c @@ -771,12 +771,14 @@ intel_logical_ring_advance_and_submit(struct drm_i915_gem_request *request) if (intel_engine_stopped(engine)) return 0; - if (engine->last_context != request->ctx) { - if (engine->last_context) - intel_lr_context_unpin(engine->last_context, engine); - intel_lr_context_pin(request->ctx, engine); - engine->last_context = request->ctx; - } + /* We keep the previous context alive until we retire the following + * request. This ensures that any the context object is still pinned + * for any residual writes the HW makes into it on the context switch + * into the next object following the breadcrumb. Otherwise, we may + * retire the context too early. + */ + request->previous_context = engine->last_context; + engine->last_context = request->ctx; if (dev_priv->guc.execbuf_client) i915_guc_submit(dev_priv->guc.execbuf_client, request);