From patchwork Tue Apr 26 20:06:02 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chris Wilson X-Patchwork-Id: 8944201 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id D973BBF29F for ; Tue, 26 Apr 2016 20:06:51 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id BE328201FE for ; Tue, 26 Apr 2016 20:06:50 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id CAD53200FE for ; Tue, 26 Apr 2016 20:06:49 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 1F9436E939; Tue, 26 Apr 2016 20:06:43 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mail-wm0-x244.google.com (mail-wm0-x244.google.com [IPv6:2a00:1450:400c:c09::244]) by gabe.freedesktop.org (Postfix) with ESMTPS id 0A67B6E933 for ; Tue, 26 Apr 2016 20:06:40 +0000 (UTC) Received: by mail-wm0-x244.google.com with SMTP id e201so7253255wme.2 for ; Tue, 26 Apr 2016 13:06:39 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references; bh=9H0XJ78sHyZYrg6cNSvudyNd8jHSmCD5hivd281c8jM=; b=vFaaJNuuijjUt9yzFyok5rsh1uirGs0g2moveDmEUn3RokYrcxt/q776k4wi9JOMgx JfSyR+RianisQj/vkv8B48kfvwjQbO5w8OtcFZK1Px+S+mKyNNpKLBQzfpl7SlaRFdOD cEsdVoYdEdMf17FJxUxihUYxeNT9xKpX307lq5oEFIYvFKZ59tLxpWCu3HZ44iR3+QsE VBDrdtUaOB6SUmbgHnuSSnKTwnHg5dLVmnMv9T3h0KFUWO64cw0xIagaOs6VjCol612O EgOpVLFkAP3yGweFiYuZ4T78dQxFWYAbkmgwSgVWj65jA2C4qEMpyp+NqXhwCtrsSGnh 6kMA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references; bh=9H0XJ78sHyZYrg6cNSvudyNd8jHSmCD5hivd281c8jM=; b=ewEB0y4HAAz3fEln2wsLkZFZgZW2QZmQXqgbCJK8qugxcH+/yCJqQeW+hQAdM2XIRB 50DoNlQSkxAAIRIuhI0QBiWoDIABAaiZMBAFB4vs10zezeOUx0h4jYNT1dT91Tti38GE +w+7KvVQajXMLBhs+VJJxAOrRzL/u4PRl8+bqljjHoGkHdOunFp7t+cGlTDShagI/H70 FE7BbtylzaLf9slpb0/yLzBcdRZl+jtb/CdHjUBKgGIABrNSajvpiagkkaJ39RMg0QJn kbD5N3a6JhhaanFOigLf1jhIvuQExvV4m+0+n7YKVjxdcEGFRDMDVm6jO0XdjM8fGHP0 QPgQ== X-Gm-Message-State: AOPr4FXk2ufTJNqJyWjjAfKi7aFaE2YXpf8p+ELu2m45A1W4wpSO9pIZRgYTai2qJFfSIQ== X-Received: by 10.194.0.113 with SMTP id 17mr5153717wjd.128.1461701198095; Tue, 26 Apr 2016 13:06:38 -0700 (PDT) Received: from haswell.alporthouse.com ([78.156.65.138]) by smtp.gmail.com with ESMTPSA id gk4sm347603wjd.7.2016.04.26.13.06.36 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 26 Apr 2016 13:06:37 -0700 (PDT) From: Chris Wilson To: intel-gfx@lists.freedesktop.org Date: Tue, 26 Apr 2016 21:06:02 +0100 Message-Id: <1461701180-895-8-git-send-email-chris@chris-wilson.co.uk> X-Mailer: git-send-email 2.8.1 In-Reply-To: <1461701180-895-1-git-send-email-chris@chris-wilson.co.uk> References: <1461701180-895-1-git-send-email-chris@chris-wilson.co.uk> Subject: [Intel-gfx] [PATCH v6 07/25] drm/i915: Mark the current context as lost on suspend X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Spam-Status: No, score=-5.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_MED,RP_MATCHES_RCVD,T_DKIM_INVALID,UNPARSEABLE_RELAY autolearn=ham version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP In order to force a reload of the context image upon resume, we first need to mark its absence on suspend. Currently we are failing to restore the golden context state and any context w/a to the default context after resume. One oversight corrected, is that we had forgotten to reapply the L3 remapping when restoring the lost default context. v2: Remove deprecated WARN. Signed-off-by: Chris Wilson Cc: Mika Kuoppala Reviewed-by: Mika Kuoppala --- drivers/gpu/drm/i915/i915_drv.h | 1 + drivers/gpu/drm/i915/i915_gem.c | 1 + drivers/gpu/drm/i915/i915_gem_context.c | 54 ++++++++++++++------------------- 3 files changed, 25 insertions(+), 31 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index 32f05979ade7..c3fbc056d6aa 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -3293,6 +3293,7 @@ void i915_gem_object_save_bit_17_swizzle(struct drm_i915_gem_object *obj); /* i915_gem_context.c */ int __must_check i915_gem_context_init(struct drm_device *dev); +void i915_gem_context_lost(struct drm_i915_private *dev_priv); void i915_gem_context_fini(struct drm_device *dev); void i915_gem_context_reset(struct drm_device *dev); int i915_gem_context_open(struct drm_device *dev, struct drm_file *file); diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c index 40f6504de7c1..f9ef11273698 100644 --- a/drivers/gpu/drm/i915/i915_gem.c +++ b/drivers/gpu/drm/i915/i915_gem.c @@ -4711,6 +4711,7 @@ i915_gem_suspend(struct drm_device *dev) i915_gem_retire_requests(dev); i915_gem_stop_engines(dev); + i915_gem_context_lost(dev_priv); mutex_unlock(&dev->struct_mutex); cancel_delayed_work_sync(&dev_priv->gpu_error.hangcheck_work); diff --git a/drivers/gpu/drm/i915/i915_gem_context.c b/drivers/gpu/drm/i915/i915_gem_context.c index 4e12bae5c659..05752a2f1810 100644 --- a/drivers/gpu/drm/i915/i915_gem_context.c +++ b/drivers/gpu/drm/i915/i915_gem_context.c @@ -90,6 +90,8 @@ #include "i915_drv.h" #include "i915_trace.h" +#define ALL_L3_SLICES(dev) (1 << NUM_L3_SLICES(dev)) - 1 + /* This is a HW constraint. The value below is the largest known requirement * I've seen in a spec to date, and that was a workaround for a non-shipping * part. It should be safe to decrease this, but it's more future proof as is. @@ -249,7 +251,7 @@ __create_hw_context(struct drm_device *dev, /* NB: Mark all slices as needing a remap so that when the context first * loads it will restore whatever remap state already exists. If there * is no remap info, it will be a NOP. */ - ctx->remap_slice = (1 << NUM_L3_SLICES(dev)) - 1; + ctx->remap_slice = ALL_L3_SLICES(dev_priv); ctx->hang_stats.ban_period_seconds = DRM_I915_CTX_BAN_PERIOD; @@ -336,7 +338,6 @@ static void i915_gem_context_unpin(struct intel_context *ctx, void i915_gem_context_reset(struct drm_device *dev) { struct drm_i915_private *dev_priv = dev->dev_private; - int i; if (i915.enable_execlists) { struct intel_context *ctx; @@ -345,17 +346,7 @@ void i915_gem_context_reset(struct drm_device *dev) intel_lr_context_reset(dev_priv, ctx); } - for (i = 0; i < I915_NUM_ENGINES; i++) { - struct intel_engine_cs *engine = &dev_priv->engine[i]; - - if (engine->last_context) { - i915_gem_context_unpin(engine->last_context, engine); - engine->last_context = NULL; - } - } - - /* Force the GPU state to be reinitialised on enabling */ - dev_priv->kernel_context->legacy_hw_ctx.initialized = false; + i915_gem_context_lost(dev_priv); } int i915_gem_context_init(struct drm_device *dev) @@ -403,11 +394,29 @@ int i915_gem_context_init(struct drm_device *dev) return 0; } +void i915_gem_context_lost(struct drm_i915_private *dev_priv) +{ + struct intel_engine_cs *engine; + + for_each_engine(engine, dev_priv) { + if (engine->last_context == NULL) + continue; + + i915_gem_context_unpin(engine->last_context, engine); + engine->last_context = NULL; + } + + /* Force the GPU state to be reinitialised on enabling */ + dev_priv->kernel_context->legacy_hw_ctx.initialized = false; + dev_priv->kernel_context->remap_slice = ALL_L3_SLICES(dev_priv); +} + void i915_gem_context_fini(struct drm_device *dev) { struct drm_i915_private *dev_priv = dev->dev_private; struct intel_context *dctx = dev_priv->kernel_context; - int i; + + i915_gem_context_lost(dev_priv); if (dctx->legacy_hw_ctx.rcs_state) { /* The only known way to stop the gpu from accessing the hw context is @@ -415,26 +424,9 @@ void i915_gem_context_fini(struct drm_device *dev) * other code, leading to spurious errors. */ intel_gpu_reset(dev, ALL_ENGINES); - /* When default context is created and switched to, base object refcount - * will be 2 (+1 from object creation and +1 from do_switch()). - * i915_gem_context_fini() will be called after gpu_idle() has switched - * to default context. So we need to unreference the base object once - * to offset the do_switch part, so that i915_gem_context_unreference() - * can then free the base object correctly. */ - WARN_ON(!dev_priv->engine[RCS].last_context); - i915_gem_object_ggtt_unpin(dctx->legacy_hw_ctx.rcs_state); } - for (i = I915_NUM_ENGINES; --i >= 0;) { - struct intel_engine_cs *engine = &dev_priv->engine[i]; - - if (engine->last_context) { - i915_gem_context_unpin(engine->last_context, engine); - engine->last_context = NULL; - } - } - i915_gem_context_unreference(dctx); dev_priv->kernel_context = NULL; }