From patchwork Thu Apr 28 01:10:54 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: tom.orourke@intel.com X-Patchwork-Id: 8964741 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id B0222BF440 for ; Thu, 28 Apr 2016 01:12:18 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id C487820274 for ; Thu, 28 Apr 2016 01:12:17 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id C46EE20219 for ; Thu, 28 Apr 2016 01:12:16 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 2ACE96EC10; Thu, 28 Apr 2016 01:11:59 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga03.intel.com (mga03.intel.com [134.134.136.65]) by gabe.freedesktop.org (Postfix) with ESMTP id C60BC6E390 for ; Thu, 28 Apr 2016 01:11:24 +0000 (UTC) Received: from orsmga001.jf.intel.com ([10.7.209.18]) by orsmga103.jf.intel.com with ESMTP; 27 Apr 2016 18:11:25 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.24,544,1455004800"; d="scan'208";a="941742148" Received: from torourke-desk.ra.intel.com (HELO localhost.localdomain) ([10.10.35.157]) by orsmga001.jf.intel.com with ESMTP; 27 Apr 2016 18:11:24 -0700 From: tom.orourke@intel.com To: intel-gfx@lists.freedesktop.org Date: Wed, 27 Apr 2016 18:10:54 -0700 Message-Id: <1461805865-212590-11-git-send-email-tom.orourke@intel.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1461805865-212590-1-git-send-email-tom.orourke@intel.com> References: <1461805865-212590-1-git-send-email-tom.orourke@intel.com> Cc: Tom O'Rourke , radoslaw.szwichtenberg@intel.com, paulo.r.zanoni@intel.com Subject: [Intel-gfx] [PATCH 10/21] drm/i915/slpc: Update current requested frequency X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Spam-Status: No, score=-5.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Tom O'Rourke When SLPC is controlling requested frequency, the rps.cur_freq value is not used to make the frequency request. Before using rps.cur_freq in sysfs or debugfs, read requested frequency from register to get the value most recently requested by SLPC firmware. v2: replace HAS_SLPC with intel_slpc_active (Paulo) v3: Avoid magic numbers (Nick) Use a function for repeated code (Jon) Signed-off-by: Tom O'Rourke --- drivers/gpu/drm/i915/i915_debugfs.c | 6 ++++++ drivers/gpu/drm/i915/i915_drv.h | 5 +++++ drivers/gpu/drm/i915/i915_reg.h | 1 + drivers/gpu/drm/i915/i915_sysfs.c | 3 +++ 4 files changed, 15 insertions(+) diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c index 8b8d6f0..1295d8b 100644 --- a/drivers/gpu/drm/i915/i915_debugfs.c +++ b/drivers/gpu/drm/i915/i915_debugfs.c @@ -1168,6 +1168,9 @@ static int i915_frequency_info(struct seq_file *m, void *unused) flush_delayed_work(&dev_priv->rps.delayed_resume_work); + if (intel_slpc_active(dev)) + dev_priv->rps.cur_freq = gen9_read_requested_freq(dev_priv); + if (IS_GEN5(dev)) { u16 rgvswctl = I915_READ16(MEMSWCTL); u16 rgvstat = I915_READ16(MEMSTAT_ILK); @@ -2399,6 +2402,9 @@ static int i915_rps_boost_info(struct seq_file *m, void *data) struct drm_i915_private *dev_priv = dev->dev_private; struct drm_file *file; + if (intel_slpc_active(dev)) + dev_priv->rps.cur_freq = gen9_read_requested_freq(dev_priv); + seq_printf(m, "RPS enabled? %d\n", dev_priv->rps.enabled); seq_printf(m, "GPU busy? %d\n", dev_priv->mm.busy); seq_printf(m, "CPU waiting? %d\n", count_irq_waiters(dev_priv)); diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index 393da67..55d31f1 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -3728,4 +3728,9 @@ static inline void i915_trace_irq_get(struct intel_engine_cs *engine, i915_gem_request_assign(&engine->trace_irq_req, req); } +static inline u8 gen9_read_requested_freq(struct drm_i915_private *dev_priv) +{ + return (u8) GEN9_GET_FREQUENCY(I915_READ(GEN6_RPNSWREQ)); +} + #endif diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index 0a2fd30..a7beb10 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -6956,6 +6956,7 @@ enum skl_disp_power_wells { #define GEN6_FREQUENCY(x) ((x)<<25) #define HSW_FREQUENCY(x) ((x)<<24) #define GEN9_FREQUENCY(x) ((x)<<23) +#define GEN9_GET_FREQUENCY(x) ((x)>>23) #define GEN6_OFFSET(x) ((x)<<19) #define GEN6_AGGRESSIVE_TURBO (0<<15) #define GEN6_RC_VIDEO_FREQ _MMIO(0xA00C) diff --git a/drivers/gpu/drm/i915/i915_sysfs.c b/drivers/gpu/drm/i915/i915_sysfs.c index 2d576b7..826e40c 100644 --- a/drivers/gpu/drm/i915/i915_sysfs.c +++ b/drivers/gpu/drm/i915/i915_sysfs.c @@ -318,6 +318,9 @@ static ssize_t gt_cur_freq_mhz_show(struct device *kdev, intel_runtime_pm_get(dev_priv); mutex_lock(&dev_priv->rps.hw_lock); + if (intel_slpc_active(dev)) + dev_priv->rps.cur_freq = gen9_read_requested_freq(dev_priv); + ret = intel_gpu_freq(dev_priv, dev_priv->rps.cur_freq); mutex_unlock(&dev_priv->rps.hw_lock);