From patchwork Sun May 1 08:15:03 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chris Wilson X-Patchwork-Id: 8988361 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 54521BF29F for ; Sun, 1 May 2016 08:15:29 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 00FF2202A1 for ; Sun, 1 May 2016 08:15:28 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id B30D92027D for ; Sun, 1 May 2016 08:15:26 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 4203D6E11D; Sun, 1 May 2016 08:15:26 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mail-wm0-x244.google.com (mail-wm0-x244.google.com [IPv6:2a00:1450:400c:c09::244]) by gabe.freedesktop.org (Postfix) with ESMTPS id 1401F6E11D; Sun, 1 May 2016 08:15:25 +0000 (UTC) Received: by mail-wm0-x244.google.com with SMTP id n129so12727496wmn.1; Sun, 01 May 2016 01:15:25 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=sender:from:to:cc:subject:date:message-id; bh=aS321UykEEdLQmwlNER8fBLuIEahe0XK69yH5lE+QSE=; b=reW1HOWx3SbiRFgNMFA/0xLWTaMxd3vYm/wpKJou/G4iD9ym4w7xz0x4b8VNs2oqjB YgG2dEBUa9kxIss5BZOe+DHREOcHFOEkx4vKG17xlz+kYaYjLuNxkTU0iPOYItO5t7Ba jZD+bnsNq/AJgtUMThHUPFmF33bBRN6R9uMNpXa9jY8YkAL955li6bctsEMaZIR7WGOR tqKUHJiAn9zC1VPYwfb2M4ls3oclGQxrK4+3yNA/8KF7ycjEJ6Y71WOOwyf1lQ+nYw5+ niyp/29XgYjqBRsv+Y3mrFLIXgz97CgAnZCHvwbs+ImCOSMuELAQiiE8Kwh/VUH2IAP4 Rt7g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id; bh=aS321UykEEdLQmwlNER8fBLuIEahe0XK69yH5lE+QSE=; b=fSjT8a9gtU4eh6ymEdhz9mhmsp2mvLEczqBAlpeD26xv/ojqmH5cpykG8ErCkbIUid k3yJxR61yXM/G000irNtr7Ogfq1ClvzhJtdzseFTbQhSWeWzMRK0vOXwnAbY81fRQY6O WLJn17T6+ELbbBq96Wr/K3MP3w8V6Rpo766klNFl9RQKYXf5Cp6KryLkmvJZGQ43ShtD pJPtfGhvAp1Eqncd0yWP69r+xR6IZ46N9zVFlxq3hhpHLvxdLKQWaFc5tuspYTWDNgtt RKwvA0xUppsf0oeFErctJ9SAZn7Gs5mZJR0Hz4PVa1G7mPFz0jADn/w85fvqXde6KalD m0yw== X-Gm-Message-State: AOPr4FWbzCLDs8XRc3hwRwQTR8YBR+cOKK8+yCupl5yQtEV0+7S4+vr7V5Slx2oPXfnH7g== X-Received: by 10.28.138.196 with SMTP id m187mr12465203wmd.61.1462090523846; Sun, 01 May 2016 01:15:23 -0700 (PDT) Received: from haswell.alporthouse.com ([78.156.65.138]) by smtp.gmail.com with ESMTPSA id a75sm12197610wme.18.2016.05.01.01.15.21 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Sun, 01 May 2016 01:15:22 -0700 (PDT) From: Chris Wilson To: intel-gfx@lists.freedesktop.org Date: Sun, 1 May 2016 09:15:03 +0100 Message-Id: <1462090503-9223-1-git-send-email-chris@chris-wilson.co.uk> X-Mailer: git-send-email 2.8.1 Cc: Daniel Vetter , dri-devel@lists.freedesktop.org, Jason Ekstrand , Akash Goel , stable@vger.kernel.org Subject: [Intel-gfx] [PATCH] drm: Restore double clflush on the last partial cacheline X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Spam-Status: No, score=-5.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_MED,RP_MATCHES_RCVD,T_DKIM_INVALID,UNPARSEABLE_RELAY autolearn=ham version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP This effectively reverts commit afcd950cafea6e27b739fe7772cbbeed37d05b8b Author: Chris Wilson Date: Wed Jun 10 15:58:01 2015 +0100 drm: Avoid the double clflush on the last cache line in drm_clflush_virt_range() as we have observed issues with serialisation of the clflush operations on Baytrail+ Atoms with partial updates. Applying the double flush on the last cacheline forces that clflush to be ordered with respect to the previous clflush, and the mfence then protects against prefetches crossing the clflush boundary. The same issue can be demonstrated in userspace with igt/gem_exec_flush. Fixes: afcd950cafea6 (drm: Avoid the double clflush on the last cache...) Testcase: igt/gem_concurrent_blit Testcase: igt/gem_partial_pread_pwrite Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=92845 Signed-off-by: Chris Wilson Cc: dri-devel@lists.freedesktop.org Cc: Akash Goel Cc: Imre Deak Cc: Daniel Vetter Cc: Jason Ekstrand Cc: stable@vger.kernel.org Reviewed-by: Mika Kuoppala --- drivers/gpu/drm/drm_cache.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/gpu/drm/drm_cache.c b/drivers/gpu/drm/drm_cache.c index 6743ff7dccfa..7f4a6c550319 100644 --- a/drivers/gpu/drm/drm_cache.c +++ b/drivers/gpu/drm/drm_cache.c @@ -136,6 +136,7 @@ drm_clflush_virt_range(void *addr, unsigned long length) mb(); for (; addr < end; addr += size) clflushopt(addr); + clflushopt(end - 1); /* force serialisation */ mb(); return; }