From patchwork Thu May 5 09:15:50 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chris Wilson X-Patchwork-Id: 9022181 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 6DC169F1C1 for ; Thu, 5 May 2016 09:16:24 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 9C18B203C1 for ; Thu, 5 May 2016 09:16:23 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id C6460203B8 for ; Thu, 5 May 2016 09:16:22 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id CE6576E957; Thu, 5 May 2016 09:16:18 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mail-wm0-x244.google.com (mail-wm0-x244.google.com [IPv6:2a00:1450:400c:c09::244]) by gabe.freedesktop.org (Postfix) with ESMTPS id CFA5B6E45D; Thu, 5 May 2016 09:16:16 +0000 (UTC) Received: by mail-wm0-x244.google.com with SMTP id e201so2341807wme.2; Thu, 05 May 2016 02:16:16 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=sender:from:to:cc:subject:date:message-id; bh=NGsfOINT0MKh0GRHQsN0NtT50Ob5pshtpomPrU0zCPM=; b=OVvYs+Y/CooQk/yhKYkS1ESgvP8SnJAnqeTcYfjNxXNwwQ7hbG4/5+slMpd9+4dbC9 k2ADrxdY0EfgSXe4dgRF+7nQj4m2Cqmvs8SPiPFx5k7pfDF3QsxVlk7V9TpxkrQLQANj TnjTHivzefck5QEQTkRfs6piTg3TAaexIVRxqkUC60WHEDRCrPa/6DbieUXy7/jdzIM9 WcJ+/awu+2NTeCtpVBW9Fzn8YujBvZNdhquGdINBBde8QYPXoyQFDqvoLsPOwlUZPFxQ N1au/QbbTwTZXx7pyCQ3PHf9i6FkPO8YxGaiKa9v9kCckEsFU3wxA2zSpCyhL2zqypp3 +uGw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id; bh=NGsfOINT0MKh0GRHQsN0NtT50Ob5pshtpomPrU0zCPM=; b=hwNSaHH6tOBClLdrXQTDAl3qsBgBoLY6xJXNZCi/+/3wtQnqo9HeIpRAu9GnhsRYtk 5v/Aqd2C8Pc58FGgcNxrKRr0yHfEkhFZtOkYe+ds03HZRi5t86DGKeVpvclyKgdsZt+q tZlRr3Q4DiA7nRTwsZJ23IY4c19WZozp118y1FeLrv4yNEcG8c4ZvQB9EWbNLDe+JDpw dmaigWtjbNgb00F9/JFiSPVUrsyptH/+rJllj/ddSTQPF0mrvh4jSBTM8S+7gX92qnc2 lpWlzyzluSuOsa2JpYpNcO422D2gzBE2L2if6ABDZDY0l2wj3ycMyH4XLx4oMCMd3U13 9fOQ== X-Gm-Message-State: AOPr4FXumrER7Dv6U8qlJwBpwsBCjIgOqbWnoJ4sk21O37cVyY8xfkotWuKN3gQ0CHTEiw== X-Received: by 10.28.30.148 with SMTP id e142mr2159549wme.69.1462439774426; Thu, 05 May 2016 02:16:14 -0700 (PDT) Received: from haswell.alporthouse.com ([78.156.65.138]) by smtp.gmail.com with ESMTPSA id s6sm8727063wjy.31.2016.05.05.02.16.12 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 05 May 2016 02:16:13 -0700 (PDT) From: Chris Wilson To: intel-gfx@lists.freedesktop.org Date: Thu, 5 May 2016 10:15:50 +0100 Message-Id: <1462439768-8615-1-git-send-email-chris@chris-wilson.co.uk> X-Mailer: git-send-email 2.8.1 Cc: Daniel Vetter , dri-devel@lists.freedesktop.org, Jason Ekstrand , Akash Goel , stable@vger.kernel.org Subject: [Intel-gfx] [PATCH 01/19] drm: Restore double clflush on the last partial cacheline X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Spam-Status: No, score=-6.2 required=5.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_MED,RP_MATCHES_RCVD,T_DKIM_INVALID,UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP This effectively reverts commit afcd950cafea6e27b739fe7772cbbeed37d05b8b Author: Chris Wilson Date: Wed Jun 10 15:58:01 2015 +0100 drm: Avoid the double clflush on the last cache line in drm_clflush_virt_range() as we have observed issues with serialisation of the clflush operations on Baytrail+ Atoms with partial updates. Applying the double flush on the last cacheline forces that clflush to be ordered with respect to the previous clflush, and the mfence then protects against prefetches crossing the clflush boundary. The same issue can be demonstrated in userspace with igt/gem_exec_flush. Fixes: afcd950cafea6 (drm: Avoid the double clflush on the last cache...) Testcase: igt/gem_concurrent_blit Testcase: igt/gem_partial_pread_pwrite Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=92845 Signed-off-by: Chris Wilson Cc: dri-devel@lists.freedesktop.org Cc: Akash Goel Cc: Imre Deak Cc: Daniel Vetter Cc: Jason Ekstrand Cc: stable@vger.kernel.org Reviewed-by: Mika Kuoppala --- drivers/gpu/drm/drm_cache.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/gpu/drm/drm_cache.c b/drivers/gpu/drm/drm_cache.c index 6743ff7dccfa..7f4a6c550319 100644 --- a/drivers/gpu/drm/drm_cache.c +++ b/drivers/gpu/drm/drm_cache.c @@ -136,6 +136,7 @@ drm_clflush_virt_range(void *addr, unsigned long length) mb(); for (; addr < end; addr += size) clflushopt(addr); + clflushopt(end - 1); /* force serialisation */ mb(); return; }