From patchwork Fri May 6 07:52:25 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chris Wilson X-Patchwork-Id: 9029881 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 7EF4FBF29F for ; Fri, 6 May 2016 07:52:38 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 87C6020389 for ; Fri, 6 May 2016 07:52:37 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id A295020382 for ; Fri, 6 May 2016 07:52:36 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id E8CDB6E1CB; Fri, 6 May 2016 07:52:34 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mail-wm0-x241.google.com (mail-wm0-x241.google.com [IPv6:2a00:1450:400c:c09::241]) by gabe.freedesktop.org (Postfix) with ESMTPS id A5F8F6E1CB for ; Fri, 6 May 2016 07:52:32 +0000 (UTC) Received: by mail-wm0-x241.google.com with SMTP id e201so7637641wme.2 for ; Fri, 06 May 2016 00:52:32 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references; bh=pgKiuHwd0L84Hc4j12L2zO6L+OTk6ivf8KFKDAjxztA=; b=i/37J366eWITeCCHpKOXntthNspmRyNLHYxatFI5CHWEU9ec0HuXhDPwE1+qrYn55Y 45q987rCVB6gHqfoRBYr3rfSaIrmeJa8U0GSgT8deMUzDQVk5p87iSWP7Wbk/NM9XNfs guYTVOGQ+fcA73GMm/zsOtglVQCYK+FyJX0ewNCtV+zqyvmyaB3zccEeTMgtR+ysvH1L oeTl3EKee1UjjGhaLeB6yThgK0m8bXpvxYDZ7IdG5hrzQ6mUNKUZT2vaJGMF6O7AJIwY B02s41zS2b3b8ddbFnY40Y9+tpTbhIaDBaGpZaG5VQERiKvrzW7SJyjw3I9kiE9nwrt/ lr2Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references; bh=pgKiuHwd0L84Hc4j12L2zO6L+OTk6ivf8KFKDAjxztA=; b=fBnxijIDyfaIqJTZXwiQ8DNCc3nQNQWZsPfu8SNMVdg/JdBQ2HzE16eyiaQ2EJHiHd 7ZVxgz9pK1C4CCiwXq00q3OVWWzS5+/Zr8Ac2+bBydfyMwnfqqxxccQ2WBU6iXaRzVN1 ma+CNJS9+b+49z340fWd+inCzKJCP43mjOpGUUf/ZqnY3fImgx/N0mLWpQESos7WcqmS /U7YFOehMPHdHHB1/mjD7tqCI0jrsaV8er7hWKNBm9sjGebXhFV5BgzWjourIEdYUYT4 AZ3sJF1qzUdCX6y1qOpQ0WXEY67F9z7S+5AdkrB/kNocrlXic76mdLhKBenEmLHE/iRZ v3UQ== X-Gm-Message-State: AOPr4FXahRgkZ46dTnZG4pDRGbh1qfRsIJOkEXI31lSJbrZD06NcUH5vMnboczB7WK+9SQ== X-Received: by 10.28.19.20 with SMTP id 20mr8146938wmt.5.1462521151315; Fri, 06 May 2016 00:52:31 -0700 (PDT) Received: from haswell.alporthouse.com ([78.156.65.138]) by smtp.gmail.com with ESMTPSA id u12sm7036271wmu.12.2016.05.06.00.52.29 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 06 May 2016 00:52:30 -0700 (PDT) From: Chris Wilson To: intel-gfx@lists.freedesktop.org Date: Fri, 6 May 2016 08:52:25 +0100 Message-Id: <1462521145-13687-1-git-send-email-chris@chris-wilson.co.uk> X-Mailer: git-send-email 2.8.1 In-Reply-To: <1462457566-27738-1-git-send-email-chris@chris-wilson.co.uk> References: <1462457566-27738-1-git-send-email-chris@chris-wilson.co.uk> Subject: [Intel-gfx] [PATCH igt v2] igt/gem_exec_parse: Simple exercise for MI_LOAD_REGISTER_REG X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Spam-Status: No, score=-6.2 required=5.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_MED,RP_MATCHES_RCVD,T_DKIM_INVALID,UNPARSEABLE_RELAY autolearn=ham version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Command parser version 7 introduces the ability to copy between regsiters from the Haswell RCS with MI_LOAD_REGISTER_REG. This provides a quick smoketest of that ability. v2: Add some negative tests as well Signed-off-by: Chris Wilson --- tests/gem_exec_parse.c | 87 ++++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 87 insertions(+) diff --git a/tests/gem_exec_parse.c b/tests/gem_exec_parse.c index aa4ea67..0bd8b8b 100644 --- a/tests/gem_exec_parse.c +++ b/tests/gem_exec_parse.c @@ -317,6 +317,90 @@ int fd; #define OACONTROL 0x2360 +static int command_parser_version(void) +{ + int version = -1; + drm_i915_getparam_t gp; + + gp.param = I915_PARAM_CMD_PARSER_VERSION; + gp.value = &version; + + if (drmIoctl(fd, DRM_IOCTL_I915_GETPARAM, &gp) == 0) + return version; + + return -1; +} + +#define HSW_CS_GPR(n) (0x2600 + 8*(n)) +#define HSW_CS_GPR0 HSW_CS_GPR(0) +#define HSW_CS_GPR1 HSW_CS_GPR(1) + +#define MI_LOAD_REGISTER_REG (0x2a << 23) +#define MI_STORE_REGISTER_MEM (0x24 << 23) +static void hsw_load_register_reg(void) +{ + uint32_t buf[16] = { + MI_LOAD_REGISTER_IMM | (5 - 2), + HSW_CS_GPR0, + 0xabcdabcd, + HSW_CS_GPR1, + 0xdeadbeef, + + MI_STORE_REGISTER_MEM | (3 - 2), + HSW_CS_GPR1, + 0, /* address0 */ + + MI_LOAD_REGISTER_REG | (3 - 2), + HSW_CS_GPR0, + HSW_CS_GPR1, + + MI_STORE_REGISTER_MEM | (3 - 2), + HSW_CS_GPR1, + 4, /* address1 */ + + MI_BATCH_BUFFER_END, + }; + struct drm_i915_gem_execbuffer2 execbuf; + struct drm_i915_gem_exec_object2 obj[2]; + struct drm_i915_gem_relocation_entry reloc[2]; + + igt_require(IS_HASWELL(intel_get_drm_devid(fd))); + igt_require(command_parser_version() >= 7); + + memset(obj, 0, sizeof(obj)); + obj[0].handle = gem_create(fd, 4096); + obj[1].handle = gem_create(fd, 4096); + gem_write(fd, obj[1].handle, 0, buf, sizeof(buf)); + + memset(reloc, 0, sizeof(reloc)); + reloc[0].offset = 7*sizeof(uint32_t); + reloc[0].target_handle = obj[0].handle; + reloc[0].delta = 0; + reloc[0].read_domains = I915_GEM_DOMAIN_INSTRUCTION; + reloc[0].write_domain = I915_GEM_DOMAIN_INSTRUCTION; + reloc[1].offset = 13*sizeof(uint32_t); + reloc[1].target_handle = obj[0].handle; + reloc[1].delta = sizeof(uint32_t); + reloc[1].read_domains = I915_GEM_DOMAIN_INSTRUCTION; + reloc[1].write_domain = I915_GEM_DOMAIN_INSTRUCTION; + obj[1].relocs_ptr = (uintptr_t)&reloc; + obj[1].relocation_count = 2; + + memset(&execbuf, 0, sizeof(execbuf)); + execbuf.buffers_ptr = (uintptr_t)obj; + execbuf.buffer_count = 2; + execbuf.batch_len = sizeof(buf); + execbuf.flags = I915_EXEC_RENDER; + gem_execbuf(fd, &execbuf); + gem_close(fd, obj[1].handle); + + gem_read(fd, obj[0].handle, 0, buf, 2*sizeof(buf[0])); + gem_close(fd, obj[0].handle); + + igt_assert_eq_u32(buf[0], 0xdeadbeef); /* before copy */ + igt_assert_eq_u32(buf[1], 0xabcdabcd); /* after copy */ +} + igt_main { igt_fixture { @@ -507,6 +591,9 @@ igt_main 0x12000000); } + igt_subtest("load-register-reg") + hsw_load_register_reg(); + igt_fixture { gem_close(fd, handle);