From patchwork Tue May 10 13:02:21 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tvrtko Ursulin X-Patchwork-Id: 9057241 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 50B6A9F1D3 for ; Tue, 10 May 2016 13:03:08 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 64C6520114 for ; Tue, 10 May 2016 13:03:07 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id 5C0402010B for ; Tue, 10 May 2016 13:03:06 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id CD70F6E63D; Tue, 10 May 2016 13:03:04 +0000 (UTC) X-Original-To: Intel-gfx@lists.freedesktop.org Delivered-To: Intel-gfx@lists.freedesktop.org Received: from mga11.intel.com (mga11.intel.com [192.55.52.93]) by gabe.freedesktop.org (Postfix) with ESMTP id C8AA66E63D for ; Tue, 10 May 2016 13:03:03 +0000 (UTC) Received: from orsmga002.jf.intel.com ([10.7.209.21]) by fmsmga102.fm.intel.com with ESMTP; 10 May 2016 06:02:24 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.24,604,1455004800"; d="scan'208";a="972541925" Received: from tursulin-linux.isw.intel.com ([10.102.226.196]) by orsmga002.jf.intel.com with ESMTP; 10 May 2016 06:02:23 -0700 From: Tvrtko Ursulin To: Intel-gfx@lists.freedesktop.org Date: Tue, 10 May 2016 14:02:21 +0100 Message-Id: <1462885341-30380-1-git-send-email-tvrtko.ursulin@linux.intel.com> X-Mailer: git-send-email 1.9.1 Cc: Jani Nikula Subject: [Intel-gfx] [PATCH] drm/i915: Use bitmask for IS_REVID checking X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Spam-Status: No, score=-6.3 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Tvrtko Ursulin With this scheme all call sites of IS_SKL_REVID and IS_BXT_REVID result in a maximum of one conditional jump instruction (was three before) and overall reduction in code size. Signed-off-by: Tvrtko Ursulin Cc: Chris Wilson Cc: Jani Nikula --- drivers/gpu/drm/i915/i915_dma.c | 11 +++++++++++ drivers/gpu/drm/i915/i915_drv.h | 24 +++++++++++++++++++----- 2 files changed, 30 insertions(+), 5 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_dma.c b/drivers/gpu/drm/i915/i915_dma.c index 46ac1da64a09..1ae812436827 100644 --- a/drivers/gpu/drm/i915/i915_dma.c +++ b/drivers/gpu/drm/i915/i915_dma.c @@ -1072,6 +1072,17 @@ static int i915_driver_init_early(struct drm_i915_private *dev_priv, memcpy(device_info, info, sizeof(dev_priv->info)); device_info->device_id = dev->pdev->device; + /* For unknown revisions mask stays at zero which is correct. */ + if (dev->pdev->revision < + sizeof(device_info->revision_mask) * BITS_PER_BYTE) + device_info->revision_mask = BIT(dev->pdev->revision); + + if (IS_SKYLAKE(dev_priv)) + device_info->skl_rev_mask = ~0; + + if (IS_BROXTON(dev_priv)) + device_info->bxt_rev_mask = ~0; + spin_lock_init(&dev_priv->irq_lock); spin_lock_init(&dev_priv->gpu_error.lock); mutex_init(&dev_priv->backlight_lock); diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index 26e7de415966..fbeb68e9ec96 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -757,6 +757,9 @@ struct intel_csr { struct intel_device_info { u32 display_mmio_offset; u16 device_id; + u8 revision_mask; + u8 skl_rev_mask; + u8 bxt_rev_mask; u8 num_pipes:3; u8 num_sprites[I915_MAX_PIPES]; u8 gen; @@ -2519,14 +2522,23 @@ struct drm_i915_cmd_table { #define INTEL_DEVID(p) (INTEL_INFO(p)->device_id) #define INTEL_REVID(p) (__I915__(p)->dev->pdev->revision) -#define REVID_FOREVER 0xff +#define REVID_FOREVER 0 + /* * Return true if revision is in range [since,until] inclusive. * * Use 0 for open-ended since, and REVID_FOREVER for open-ended until. */ -#define IS_REVID(p, since, until) \ - (INTEL_REVID(p) >= (since) && INTEL_REVID(p) <= (until)) +#define IS_REVID(p, mask, since, until) ({\ + unsigned int __s = (since), __e = (until); \ + BUILD_BUG_ON(!__builtin_constant_p(since)); \ + BUILD_BUG_ON(!__builtin_constant_p(until)); \ + BUILD_BUG_ON(since >= sizeof(INTEL_INFO(p)->revision_mask) * BITS_PER_BYTE); \ + BUILD_BUG_ON(until >= sizeof(INTEL_INFO(p)->revision_mask) * BITS_PER_BYTE); \ + if ((__e) == REVID_FOREVER) \ + __e = BITS_PER_LONG - 1; \ + !!(INTEL_INFO(p)->revision_mask & (mask) & GENMASK((__e), (__s))); \ +}) #define IS_I830(dev) (INTEL_DEVID(dev) == 0x3577) #define IS_845G(dev) (INTEL_DEVID(dev) == 0x2562) @@ -2605,14 +2617,16 @@ struct drm_i915_cmd_table { #define SKL_REVID_E0 0x4 #define SKL_REVID_F0 0x5 -#define IS_SKL_REVID(p, since, until) (IS_SKYLAKE(p) && IS_REVID(p, since, until)) +#define IS_SKL_REVID(p, since, until) IS_REVID(p, INTEL_INFO(p)->skl_rev_mask, \ + since, until) #define BXT_REVID_A0 0x0 #define BXT_REVID_A1 0x1 #define BXT_REVID_B0 0x3 #define BXT_REVID_C0 0x9 -#define IS_BXT_REVID(p, since, until) (IS_BROXTON(p) && IS_REVID(p, since, until)) +#define IS_BXT_REVID(p, since, until) IS_REVID(p, INTEL_INFO(p)->bxt_rev_mask, \ + since, until) /* * The genX designation typically refers to the render engine, so render