From patchwork Fri May 13 17:52:27 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chris Wilson X-Patchwork-Id: 9092761 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 31DC0BF29F for ; Fri, 13 May 2016 17:52:43 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 12ABF2022D for ; Fri, 13 May 2016 17:52:42 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id F3D942021A for ; Fri, 13 May 2016 17:52:40 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 16EB66EAE3; Fri, 13 May 2016 17:52:39 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mail-wm0-x242.google.com (mail-wm0-x242.google.com [IPv6:2a00:1450:400c:c09::242]) by gabe.freedesktop.org (Postfix) with ESMTPS id 79B176EAE2 for ; Fri, 13 May 2016 17:52:37 +0000 (UTC) Received: by mail-wm0-x242.google.com with SMTP id r12so5116715wme.0 for ; Fri, 13 May 2016 10:52:37 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=sender:from:to:subject:date:message-id:in-reply-to:references; bh=EENuqYTE/drby0CmIJDHSGROFj3PQMm2VLb5mr5cP9I=; b=h+aWwSynOcNyrW6hZzYxgO+1KBYEhKI4Z9fhfXCNF2iq6nSa4fYagZUYoWGNLzhhAz 4IXVbZeCM6N0uVcUCpZxg3pU2oH53CEgKb8iMIYkT4RhcBOPIOfipWmrFstLEOFwedGr r2w39wId+j9JnFdJ83wKcL8PflaFnGq6/481L8cbyEOD1oR2AACoQzPHg6MQcnH2q+RK XxBU5Qb3t2UjCREYLw651f8pWEa7Pe5bC2JTHVHGkLmCIMrMUq4fjr/u3E6W0eQaTlVN /8zo5ch5RbnsjzlUa9HS+CBtingOWLTV7IK5JmfOFPRZRamQvs5gCfDYMUFILn8P8fBn 7KBQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:sender:from:to:subject:date:message-id :in-reply-to:references; bh=EENuqYTE/drby0CmIJDHSGROFj3PQMm2VLb5mr5cP9I=; b=FOTRHABbmQ4+c+0M2sfEijcGqQlPRPl04Ca6aNS/TKG5ZZI6vfzfnqfT+EBa7BOvx0 b5Ww0hrMSfVu3BhXdTluxaqzhg4akkI1uGj5WsFTdP81m/oOr26O7ZqF6O6hYepHt/vl ZAwEfPTi/fLU+MFBXwvyRaCkreZy+tTGx22pGO3/QNifeguiPG7DTPA4cghMo20GAWIz ueUWpU/RBce8f+UzpvUjPnaU9iCVe6HCDOmj/IxtSWKnESRxJBGEO4rViagm5ZO0Acty /Wlo55cLSc6e7FwIDK9bj0esygfFz5EajkVF8H7PoY6JhyYjPzzVfgwBDAFuncPX0guB Xyzg== X-Gm-Message-State: AOPr4FVUt0reQv41t+qUg4hAG4oAdwVKlQzOxnrKxN0S2WUPYvIrDRH0ZI6PhDECQGDtNg== X-Received: by 10.194.192.106 with SMTP id hf10mr17219123wjc.52.1463161956130; Fri, 13 May 2016 10:52:36 -0700 (PDT) Received: from haswell.alporthouse.com ([78.156.65.138]) by smtp.gmail.com with ESMTPSA id n66sm4358895wmf.6.2016.05.13.10.52.34 for (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 13 May 2016 10:52:34 -0700 (PDT) From: Chris Wilson To: intel-gfx@lists.freedesktop.org Date: Fri, 13 May 2016 18:52:27 +0100 Message-Id: <1463161950-3491-1-git-send-email-chris@chris-wilson.co.uk> X-Mailer: git-send-email 2.8.1 In-Reply-To: <1463053288-24953-1-git-send-email-chris@chris-wilson.co.uk> References: <1463053288-24953-1-git-send-email-chris@chris-wilson.co.uk> Subject: [Intel-gfx] [CI 1/4] drm/i915: Add distinct stubs for PM hibernation phases X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Spam-Status: No, score=-5.5 required=5.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_MED,RP_MATCHES_RCVD,T_DKIM_INVALID,UNPARSEABLE_RELAY autolearn=ham version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Currently for handling the extra hibernation phases we just call the equivalent suspend/resume phases. In the next couple of patches, I wish to specialise the hibernation phases to reduce the amount of work required for handling GEM objects. v2: There are more! Don't forget the freeze phases. Signed-off-by: Chris Wilson Cc: Imre Deak Cc: David Weinehall Reviewed-by: Joonas Lahtinen Reviewed-by: Imre Deak --- drivers/gpu/drm/i915/i915_drv.c | 45 +++++++++++++++++++++++++++++++++++------ 1 file changed, 39 insertions(+), 6 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c index 5ae79601335c..6a2e7f84276b 100644 --- a/drivers/gpu/drm/i915/i915_drv.c +++ b/drivers/gpu/drm/i915/i915_drv.c @@ -1115,6 +1115,39 @@ static int i915_pm_resume(struct device *dev) return i915_drm_resume(drm_dev); } +/* freeze: before creating the hibernation_image */ +static int i915_pm_freeze(struct device *dev) +{ + return i915_pm_suspend(dev); +} + +static int i915_pm_freeze_late(struct device *dev) +{ + return i915_pm_suspend_late(dev); +} + +/* thaw: called after creating the hibernation image, but before turning off. */ +static int i915_pm_thaw_early(struct device *dev) +{ + return i915_pm_resume_early(dev); +} + +static int i915_pm_thaw(struct device *dev) +{ + return i915_pm_resume(dev); +} + +/* restore: called after loading the hibernation image. */ +static int i915_pm_restore_early(struct device *dev) +{ + return i915_pm_resume_early(dev); +} + +static int i915_pm_restore(struct device *dev) +{ + return i915_pm_resume(dev); +} + /* * Save all Gunit registers that may be lost after a D3 and a subsequent * S0i[R123] transition. The list of registers needing a save/restore is @@ -1669,14 +1702,14 @@ static const struct dev_pm_ops i915_pm_ops = { * @restore, @restore_early : called after rebooting and restoring the * hibernation image [PMSG_RESTORE] */ - .freeze = i915_pm_suspend, - .freeze_late = i915_pm_suspend_late, - .thaw_early = i915_pm_resume_early, - .thaw = i915_pm_resume, + .freeze = i915_pm_freeze, + .freeze_late = i915_pm_freeze_late, + .thaw_early = i915_pm_thaw_early, + .thaw = i915_pm_thaw, .poweroff = i915_pm_suspend, .poweroff_late = i915_pm_poweroff_late, - .restore_early = i915_pm_resume_early, - .restore = i915_pm_resume, + .restore_early = i915_pm_restore_early, + .restore = i915_pm_restore, /* S0ix (via runtime suspend) event handlers */ .runtime_suspend = intel_runtime_suspend,