From patchwork Sun May 15 17:32:45 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Wang, Zhi A" X-Patchwork-Id: 9096701 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 472839F372 for ; Sun, 15 May 2016 17:38:54 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 7B67F20263 for ; Sun, 15 May 2016 17:38:53 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id A0A022010E for ; Sun, 15 May 2016 17:38:52 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 427536E3B3; Sun, 15 May 2016 17:38:45 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga11.intel.com (mga11.intel.com [192.55.52.93]) by gabe.freedesktop.org (Postfix) with ESMTP id C3A6F6E39F for ; Sun, 15 May 2016 17:38:19 +0000 (UTC) Received: from orsmga002.jf.intel.com ([10.7.209.21]) by fmsmga102.fm.intel.com with ESMTP; 15 May 2016 10:38:19 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.24,623,1455004800"; d="scan'208";a="977259726" Received: from dev-inno.bj.intel.com ([10.238.135.69]) by orsmga002.jf.intel.com with ESMTP; 15 May 2016 10:38:18 -0700 From: Zhi Wang To: intel-gfx@lists.freedesktop.org, david.s.gordon@intel.com, joonas.lahtinen@linux.intel.com, kevin.tian@intel.com, zhiyuan.lv@intel.com Date: Mon, 16 May 2016 01:32:45 +0800 Message-Id: <1463333573-25112-8-git-send-email-zhi.a.wang@intel.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1463333573-25112-1-git-send-email-zhi.a.wang@intel.com> References: <1463333573-25112-1-git-send-email-zhi.a.wang@intel.com> Subject: [Intel-gfx] [PATCH 07/15] drm/i915: Populate context PDPs if it has a PPGTT X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Spam-Status: No, score=-5.6 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP As we allow contexts without PPGTT to be created, we should check if a context has a PPGTT before populating PDPs from it. Signed-off-by: Zhi Wang --- drivers/gpu/drm/i915/intel_lrc.c | 29 ++++++++++++++++------------- 1 file changed, 16 insertions(+), 13 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c index 397fe65..c8fbdfb 100644 --- a/drivers/gpu/drm/i915/intel_lrc.c +++ b/drivers/gpu/drm/i915/intel_lrc.c @@ -2386,19 +2386,22 @@ populate_lr_context(struct intel_context *ctx, ASSIGN_CTX_REG(reg_state, CTX_PDP0_LDW, GEN8_RING_PDP_LDW(engine, 0), 0); - if (USES_FULL_48BIT_PPGTT(ppgtt->base.dev)) { - /* 64b PPGTT (48bit canonical) - * PDP0_DESCRIPTOR contains the base address to PML4 and - * other PDP Descriptors are ignored. - */ - ASSIGN_CTX_PML4(ppgtt, reg_state); - } else { - /* 32b PPGTT - * PDP*_DESCRIPTOR contains the base address of space supported. - * With dynamic page allocation, PDPs may not be allocated at - * this point. Point the unallocated PDPs to the scratch page - */ - execlists_update_context_pdps(ppgtt, reg_state); + if (ctx->ppgtt) { + if (USES_FULL_48BIT_PPGTT(ppgtt->base.dev)) { + /* 64b PPGTT (48bit canonical) + * PDP0_DESCRIPTOR contains the base address to PML4 and + * other PDP Descriptors are ignored. + */ + ASSIGN_CTX_PML4(ppgtt, reg_state); + } else { + /* 32b PPGTT + * PDP*_DESCRIPTOR contains the base address of space + * supported. With dynamic page allocation, PDPs may + * not be allocated at this point. Point the unallocated + * PDPs to the scratch page + */ + execlists_update_context_pdps(ppgtt, reg_state); + } } if (engine->id == RCS) {