@@ -412,6 +412,52 @@ int drm_dp_link_power_down(struct drm_dp_aux *aux, struct drm_dp_link *link)
}
EXPORT_SYMBOL(drm_dp_link_power_down);
+/*
+ * drm_dp_bd() - read DisplayPort Receiver Capability Fields for
+ * DP branch devices
+ * @aux: DisplayPort AUX channel
+ * @bd: pointer to a structure containing DP branch device information
+ *
+ * Returns 0 on success or a negative error code on failure.
+ */
+int drm_dp_bd(struct drm_dp_aux *aux, struct drm_dp_bd *bd)
+{
+ uint8_t info[4];
+ uint8_t dfp;
+ bool detailed_cap_info;
+ int err, size;
+
+ err = drm_dp_dpcd_read(aux, DP_DOWNSTREAMPORT_PRESENT, &dfp, sizeof(dfp));
+ if (err < 0)
+ return err;
+
+ bd->present = dfp & 0x1;
+
+ if (!bd->present)
+ return 0;
+
+ detailed_cap_info = dfp & DP_DETAILED_CAP_INFO_AVAILABLE;
+
+ size = detailed_cap_info ? 4 : 1;
+
+ err = drm_dp_dpcd_read(aux, DP_DOWNSTREAM_PORT_0, info, size);
+ if (err < 0)
+ return err;
+
+ bd->type = info[0] & DP_DS_PORT_TYPE_MASK;
+ bd->hpd = info[0] & DP_DS_PORT_HPD;
+
+ if (detailed_cap_info) {
+ if (bd->type & DP_DS_PORT_TYPE_VGA) {
+ bd->dfp.vga.dot_clk = info[1] * 8 * 1000;
+ bd->dfp.vga.bpc = info[2] & DP_DS_VGA_MAX_BPC_MASK;
+ }
+ }
+
+ return 0;
+}
+EXPORT_SYMBOL(drm_dp_bd);
+
/**
* drm_dp_link_configure() - configure a DisplayPort link
* @aux: DisplayPort AUX channel
@@ -866,6 +866,8 @@ struct intel_dp {
bool train_set_valid;
+ struct drm_dp_bd bd;
+
/* Displayport compliance testing */
unsigned long compliance_test_type;
unsigned long compliance_test_data;
@@ -801,10 +801,31 @@ struct drm_dp_link {
unsigned long capabilities;
};
+/*
+ * DP to VGA
+ */
+struct drm_dp_vga {
+ int dot_clk;
+ uint8_t bpc;
+};
+
+/*
+ * Branch device
+ */
+struct drm_dp_bd {
+ bool present;
+ int type;
+ bool hpd;
+ union {
+ struct drm_dp_vga vga;
+ } dfp;
+};
+
int drm_dp_link_probe(struct drm_dp_aux *aux, struct drm_dp_link *link);
int drm_dp_link_power_up(struct drm_dp_aux *aux, struct drm_dp_link *link);
int drm_dp_link_power_down(struct drm_dp_aux *aux, struct drm_dp_link *link);
int drm_dp_link_configure(struct drm_dp_aux *aux, struct drm_dp_link *link);
+int drm_dp_bd(struct drm_dp_aux *aux, struct drm_dp_bd *bd);
int drm_dp_aux_register(struct drm_dp_aux *aux);
void drm_dp_aux_unregister(struct drm_dp_aux *aux);
Read from DPCD receiver capability field the max allowed pixel clock and bits per component for DP to VGA converter. Signed-off-by: Mika Kahola <mika.kahola@intel.com> --- drivers/gpu/drm/drm_dp_helper.c | 46 ++++++++++++++++++++++++++++++++++++++++ drivers/gpu/drm/i915/intel_drv.h | 2 ++ include/drm/drm_dp_helper.h | 21 ++++++++++++++++++ 3 files changed, 69 insertions(+)