| Message ID | 1464276586-17939-22-git-send-email-mika.kuoppala@intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
On Thu, May 26, 2016 at 06:29:44PM +0300, Mika Kuoppala wrote: > According to bspec this prevents screen corruption when fbc is > used. > > References: HSD#2135555, HSD#2137270 > Cc: Paulo Zanoni <paulo.r.zanoni@intel.com> > Signed-off-by: Mika Kuoppala <mika.kuoppala@intel.com> > --- > drivers/gpu/drm/i915/intel_pm.c | 5 ++++- > 1 file changed, 4 insertions(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c > index 262180c0ba70..62734a16e873 100644 > --- a/drivers/gpu/drm/i915/intel_pm.c > +++ b/drivers/gpu/drm/i915/intel_pm.c > @@ -67,6 +67,9 @@ static void gen9_init_clock_gating(struct drm_device *dev) > > I915_WRITE(GEN8_CHICKEN_DCPR_1, > I915_READ(GEN8_CHICKEN_DCPR_1) | MASK_WAKEMEM); > + > + I915_WRITE(DISP_ARB_CTL, > + I915_READ(DISP_ARB_CTL) | DISP_FBC_WM_DIS); Hmm I thought that FBC WM doesn't exist anymore on SKL+. I'm pretty sure we don't have any code for it at least. > } > > static void bxt_init_clock_gating(struct drm_device *dev) > @@ -2798,7 +2801,7 @@ static void ilk_write_wm_values(struct drm_i915_private *dev_priv, > > if (dirty & WM_DIRTY_FBC) { > val = I915_READ(DISP_ARB_CTL); > - if (results->enable_fbc_wm) > + if (!IS_GEN9(dev) && results->enable_fbc_wm) That code won't even run SKL+. > val &= ~DISP_FBC_WM_DIS; > else > val |= DISP_FBC_WM_DIS; > -- > 2.5.0 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/intel-gfx
On Thu, May 26, 2016 at 06:53:18PM +0300, Ville Syrjälä wrote: > On Thu, May 26, 2016 at 06:29:44PM +0300, Mika Kuoppala wrote: > > According to bspec this prevents screen corruption when fbc is > > used. > > > > References: HSD#2135555, HSD#2137270 > > Cc: Paulo Zanoni <paulo.r.zanoni@intel.com> > > Signed-off-by: Mika Kuoppala <mika.kuoppala@intel.com> > > --- > > drivers/gpu/drm/i915/intel_pm.c | 5 ++++- > > 1 file changed, 4 insertions(+), 1 deletion(-) > > > > diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c > > index 262180c0ba70..62734a16e873 100644 > > --- a/drivers/gpu/drm/i915/intel_pm.c > > +++ b/drivers/gpu/drm/i915/intel_pm.c > > @@ -67,6 +67,9 @@ static void gen9_init_clock_gating(struct drm_device *dev) > > > > I915_WRITE(GEN8_CHICKEN_DCPR_1, > > I915_READ(GEN8_CHICKEN_DCPR_1) | MASK_WAKEMEM); > > + > > + I915_WRITE(DISP_ARB_CTL, > > + I915_READ(DISP_ARB_CTL) | DISP_FBC_WM_DIS); > > Hmm I thought that FBC WM doesn't exist anymore on SKL+. I'm pretty sure > we don't have any code for it at least. Hmm. I guess the bit still does something though. Do we want to start using the bspec w/a IDs in comments? Hmm. w/a db seems to have a name for this FBC stuff as well. This one looks like WaFbcTurnOffFbcWatermark > > > } > > > > static void bxt_init_clock_gating(struct drm_device *dev) > > @@ -2798,7 +2801,7 @@ static void ilk_write_wm_values(struct drm_i915_private *dev_priv, > > > > if (dirty & WM_DIRTY_FBC) { > > val = I915_READ(DISP_ARB_CTL); > > - if (results->enable_fbc_wm) > > + if (!IS_GEN9(dev) && results->enable_fbc_wm) > > That code won't even run SKL+. > > > val &= ~DISP_FBC_WM_DIS; > > else > > val |= DISP_FBC_WM_DIS; > > -- > > 2.5.0 > > > > _______________________________________________ > > Intel-gfx mailing list > > Intel-gfx@lists.freedesktop.org > > https://lists.freedesktop.org/mailman/listinfo/intel-gfx > > -- > Ville Syrjälä > Intel OTC > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/intel-gfx
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c index 262180c0ba70..62734a16e873 100644 --- a/drivers/gpu/drm/i915/intel_pm.c +++ b/drivers/gpu/drm/i915/intel_pm.c @@ -67,6 +67,9 @@ static void gen9_init_clock_gating(struct drm_device *dev) I915_WRITE(GEN8_CHICKEN_DCPR_1, I915_READ(GEN8_CHICKEN_DCPR_1) | MASK_WAKEMEM); + + I915_WRITE(DISP_ARB_CTL, + I915_READ(DISP_ARB_CTL) | DISP_FBC_WM_DIS); } static void bxt_init_clock_gating(struct drm_device *dev) @@ -2798,7 +2801,7 @@ static void ilk_write_wm_values(struct drm_i915_private *dev_priv, if (dirty & WM_DIRTY_FBC) { val = I915_READ(DISP_ARB_CTL); - if (results->enable_fbc_wm) + if (!IS_GEN9(dev) && results->enable_fbc_wm) val &= ~DISP_FBC_WM_DIS; else val |= DISP_FBC_WM_DIS;
According to bspec this prevents screen corruption when fbc is used. References: HSD#2135555, HSD#2137270 Cc: Paulo Zanoni <paulo.r.zanoni@intel.com> Signed-off-by: Mika Kuoppala <mika.kuoppala@intel.com> --- drivers/gpu/drm/i915/intel_pm.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-)