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[06/23] drm/i915/kbl: Add WaEnableGapsTsvCreditFix

Message ID 1464276586-17939-7-git-send-email-mika.kuoppala@intel.com (mailing list archive)
State New, archived
Headers show

Commit Message

Mika Kuoppala May 26, 2016, 3:29 p.m. UTC
We need this crucial workaround from skl also to all kbl revisions.
Lack of it was causing system hangs on skl enabling so this is
a must have.

References: HSD#2126660
Signed-off-by: Mika Kuoppala <mika.kuoppala@intel.com>
---
 drivers/gpu/drm/i915/intel_ringbuffer.c | 13 +++++++------
 1 file changed, 7 insertions(+), 6 deletions(-)

Comments

arun.siluvery@linux.intel.com May 27, 2016, 8:14 a.m. UTC | #1
On 26/05/2016 20:59, Mika Kuoppala wrote:
> We need this crucial workaround from skl also to all kbl revisions.
> Lack of it was causing system hangs on skl enabling so this is
> a must have.
>
> References: HSD#2126660
> Signed-off-by: Mika Kuoppala <mika.kuoppala@intel.com>
> ---
>   drivers/gpu/drm/i915/intel_ringbuffer.c | 13 +++++++------
>   1 file changed, 7 insertions(+), 6 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
> index 91d5d093f3cb..3902700d37ef 100644
> --- a/drivers/gpu/drm/i915/intel_ringbuffer.c
> +++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
> @@ -1000,6 +1000,13 @@ static int gen9_init_workarounds(struct intel_engine_cs *engine)
>   		WA_SET_BIT_MASKED(HALF_SLICE_CHICKEN3,
>   				  GEN8_SAMPLER_POWER_BYPASS_DIS);
>
> +	/* WaEnableGapsTsvCreditFix:skl,kbl */
> +	if (IS_SKL_REVID(dev_priv, SKL_REVID_C0, REVID_FOREVER) ||
> +	    IS_KABYLAKE(dev_priv)) {
> +		I915_WRITE(GEN8_GARBCNTL, (I915_READ(GEN8_GARBCNTL) |
> +					   GEN9_GAPS_TSV_CREDIT_DISABLE));
> +	}
Based on the feedback that I got earlier, if a WA is applicable to 
different platforms and specific revisions then it was suggested to keep 
them in individual functions so that we can avoid revid checks in the 
common function.

regards
Arun

> +
>   	/* WaDisableSTUnitPowerOptimization:skl,bxt,kbl */
>   	WA_SET_BIT_MASKED(HALF_SLICE_CHICKEN2, GEN8_ST_PO_DISABLE);
>
> @@ -1094,12 +1101,6 @@ static int skl_init_workarounds(struct intel_engine_cs *engine)
>   		I915_WRITE(GEN8_L3SQCREG4, I915_READ(GEN8_L3SQCREG4) |
>   			   GEN8_LQSC_RO_PERF_DIS);
>
> -	/* WaEnableGapsTsvCreditFix:skl */
> -	if (IS_SKL_REVID(dev_priv, SKL_REVID_C0, REVID_FOREVER)) {
> -		I915_WRITE(GEN8_GARBCNTL, (I915_READ(GEN8_GARBCNTL) |
> -					   GEN9_GAPS_TSV_CREDIT_DISABLE));
> -	}
> -
>   	/* WaDisablePowerCompilerClockGating:skl */
>   	if (IS_SKL_REVID(dev_priv, SKL_REVID_B0, SKL_REVID_B0))
>   		WA_SET_BIT_MASKED(HIZ_CHICKEN,
>
diff mbox

Patch

diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
index 91d5d093f3cb..3902700d37ef 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.c
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
@@ -1000,6 +1000,13 @@  static int gen9_init_workarounds(struct intel_engine_cs *engine)
 		WA_SET_BIT_MASKED(HALF_SLICE_CHICKEN3,
 				  GEN8_SAMPLER_POWER_BYPASS_DIS);
 
+	/* WaEnableGapsTsvCreditFix:skl,kbl */
+	if (IS_SKL_REVID(dev_priv, SKL_REVID_C0, REVID_FOREVER) ||
+	    IS_KABYLAKE(dev_priv)) {
+		I915_WRITE(GEN8_GARBCNTL, (I915_READ(GEN8_GARBCNTL) |
+					   GEN9_GAPS_TSV_CREDIT_DISABLE));
+	}
+
 	/* WaDisableSTUnitPowerOptimization:skl,bxt,kbl */
 	WA_SET_BIT_MASKED(HALF_SLICE_CHICKEN2, GEN8_ST_PO_DISABLE);
 
@@ -1094,12 +1101,6 @@  static int skl_init_workarounds(struct intel_engine_cs *engine)
 		I915_WRITE(GEN8_L3SQCREG4, I915_READ(GEN8_L3SQCREG4) |
 			   GEN8_LQSC_RO_PERF_DIS);
 
-	/* WaEnableGapsTsvCreditFix:skl */
-	if (IS_SKL_REVID(dev_priv, SKL_REVID_C0, REVID_FOREVER)) {
-		I915_WRITE(GEN8_GARBCNTL, (I915_READ(GEN8_GARBCNTL) |
-					   GEN9_GAPS_TSV_CREDIT_DISABLE));
-	}
-
 	/* WaDisablePowerCompilerClockGating:skl */
 	if (IS_SKL_REVID(dev_priv, SKL_REVID_B0, SKL_REVID_B0))
 		WA_SET_BIT_MASKED(HIZ_CHICKEN,