| Message ID | 1464359224-11436-23-git-send-email-mika.kuoppala@intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
On Fri, May 27, 2016 at 05:27:02PM +0300, Mika Kuoppala wrote: > Set bit 8 in 0x43224 to prevent screen corruption and system > hangs on high memory bandwidth conditions. The same wa also suggest > setting bit 31 on ARB_CTL. According to another workaround we gain > better idle power savings when FBC is enabled. > > v2: use correct workaround name > > References: HSD#2137218, HSD#2227171, HSD#2136579, BSID#883 > Cc: Paulo Zanoni <paulo.r.zanoni@intel.com> > Signed-off-by: Mika Kuoppala <mika.kuoppala@intel.com> > --- > drivers/gpu/drm/i915/i915_reg.h | 2 ++ > drivers/gpu/drm/i915/intel_pm.c | 9 +++++++-- > 2 files changed, 9 insertions(+), 2 deletions(-) > > diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h > index 280d2137f90f..2f3a3960f5f7 100644 > --- a/drivers/gpu/drm/i915/i915_reg.h > +++ b/drivers/gpu/drm/i915/i915_reg.h > @@ -2208,6 +2208,7 @@ enum skl_disp_power_wells { > #define ILK_DPFC_STATUS _MMIO(0x43210) > #define ILK_DPFC_FENCE_YOFF _MMIO(0x43218) > #define ILK_DPFC_CHICKEN _MMIO(0x43224) > +#define ILK_DPFC_DISABLE_DUMMY0 (1<<8) > #define ILK_FBC_RT_BASE _MMIO(0x2128) > #define ILK_FBC_RT_VALID (1<<0) > #define SNB_FBC_FRONT_BUFFER (1<<1) > @@ -6053,6 +6054,7 @@ enum skl_disp_power_wells { > #define CHICKEN_PIPESL_1(pipe) _MMIO_PIPE(pipe, _CHICKEN_PIPESL_1_A, _CHICKEN_PIPESL_1_B) > > #define DISP_ARB_CTL _MMIO(0x45000) > +#define DISP_FBC_MEMORY_WAKE (1<<31) > #define DISP_TILE_SURFACE_SWIZZLING (1<<13) > #define DISP_FBC_WM_DIS (1<<15) > #define DISP_ARB_CTL2 _MMIO(0x45004) > diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c > index b2acb82b302b..6d9cf487ea40 100644 > --- a/drivers/gpu/drm/i915/intel_pm.c > +++ b/drivers/gpu/drm/i915/intel_pm.c > @@ -70,8 +70,13 @@ static void gen9_init_clock_gating(struct drm_device *dev) > I915_READ(GEN8_CHICKEN_DCPR_1) | MASK_WAKEMEM); > > /* WaFbcTurnOffFbcWatermark:skl,bxt,kbl */ > - I915_WRITE(DISP_ARB_CTL, > - I915_READ(DISP_ARB_CTL) | DISP_FBC_WM_DIS); > + /* WaFbcWakeMemOn:skl,bxt,kbl */ > + I915_WRITE(DISP_ARB_CTL, I915_READ(DISP_ARB_CTL) | > + DISP_FBC_WM_DIS | > + DISP_FBC_MEMORY_WAKE); > + > + I915_WRITE(ILK_DPFC_CHICKEN, I915_READ(ILK_DPFC_CHICKEN) | > + ILK_DPFC_DISABLE_DUMMY0); I think we might have two partially overlapping w/as here: WaFbcWakeMemOn and WaFbcHighMemBwCorruptionAvoidance. Not sure if the latter applies to all of KBL. w/a db says all, bspec says a0,b0 only. Might want to add the other w/a name as well at least. With that this is Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> > } > > static void bxt_init_clock_gating(struct drm_device *dev) > -- > 2.5.0 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Ville Syrjälä <ville.syrjala@linux.intel.com> writes: > [ text/plain ] > On Fri, May 27, 2016 at 05:27:02PM +0300, Mika Kuoppala wrote: >> Set bit 8 in 0x43224 to prevent screen corruption and system >> hangs on high memory bandwidth conditions. The same wa also suggest >> setting bit 31 on ARB_CTL. According to another workaround we gain >> better idle power savings when FBC is enabled. >> >> v2: use correct workaround name >> >> References: HSD#2137218, HSD#2227171, HSD#2136579, BSID#883 >> Cc: Paulo Zanoni <paulo.r.zanoni@intel.com> >> Signed-off-by: Mika Kuoppala <mika.kuoppala@intel.com> >> --- >> drivers/gpu/drm/i915/i915_reg.h | 2 ++ >> drivers/gpu/drm/i915/intel_pm.c | 9 +++++++-- >> 2 files changed, 9 insertions(+), 2 deletions(-) >> >> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h >> index 280d2137f90f..2f3a3960f5f7 100644 >> --- a/drivers/gpu/drm/i915/i915_reg.h >> +++ b/drivers/gpu/drm/i915/i915_reg.h >> @@ -2208,6 +2208,7 @@ enum skl_disp_power_wells { >> #define ILK_DPFC_STATUS _MMIO(0x43210) >> #define ILK_DPFC_FENCE_YOFF _MMIO(0x43218) >> #define ILK_DPFC_CHICKEN _MMIO(0x43224) >> +#define ILK_DPFC_DISABLE_DUMMY0 (1<<8) >> #define ILK_FBC_RT_BASE _MMIO(0x2128) >> #define ILK_FBC_RT_VALID (1<<0) >> #define SNB_FBC_FRONT_BUFFER (1<<1) >> @@ -6053,6 +6054,7 @@ enum skl_disp_power_wells { >> #define CHICKEN_PIPESL_1(pipe) _MMIO_PIPE(pipe, _CHICKEN_PIPESL_1_A, _CHICKEN_PIPESL_1_B) >> >> #define DISP_ARB_CTL _MMIO(0x45000) >> +#define DISP_FBC_MEMORY_WAKE (1<<31) >> #define DISP_TILE_SURFACE_SWIZZLING (1<<13) >> #define DISP_FBC_WM_DIS (1<<15) >> #define DISP_ARB_CTL2 _MMIO(0x45004) >> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c >> index b2acb82b302b..6d9cf487ea40 100644 >> --- a/drivers/gpu/drm/i915/intel_pm.c >> +++ b/drivers/gpu/drm/i915/intel_pm.c >> @@ -70,8 +70,13 @@ static void gen9_init_clock_gating(struct drm_device *dev) >> I915_READ(GEN8_CHICKEN_DCPR_1) | MASK_WAKEMEM); >> >> /* WaFbcTurnOffFbcWatermark:skl,bxt,kbl */ >> - I915_WRITE(DISP_ARB_CTL, >> - I915_READ(DISP_ARB_CTL) | DISP_FBC_WM_DIS); >> + /* WaFbcWakeMemOn:skl,bxt,kbl */ >> + I915_WRITE(DISP_ARB_CTL, I915_READ(DISP_ARB_CTL) | >> + DISP_FBC_WM_DIS | >> + DISP_FBC_MEMORY_WAKE); >> + >> + I915_WRITE(ILK_DPFC_CHICKEN, I915_READ(ILK_DPFC_CHICKEN) | >> + ILK_DPFC_DISABLE_DUMMY0); > > I think we might have two partially overlapping w/as here: > WaFbcWakeMemOn and WaFbcHighMemBwCorruptionAvoidance. Not sure if the > latter applies to all of KBL. w/a db says all, bspec says a0,b0 only. > > Might want to add the other w/a name as well at least. With that this is > Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> > I decided to split this for WaFbcNukeOnHostModify and WaFbcHighMemBwCorruptionAvoidance. -Mika >> } >> >> static void bxt_init_clock_gating(struct drm_device *dev) >> -- >> 2.5.0 >> >> _______________________________________________ >> Intel-gfx mailing list >> Intel-gfx@lists.freedesktop.org >> https://lists.freedesktop.org/mailman/listinfo/intel-gfx > > -- > Ville Syrjälä > Intel OTC
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index 280d2137f90f..2f3a3960f5f7 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -2208,6 +2208,7 @@ enum skl_disp_power_wells { #define ILK_DPFC_STATUS _MMIO(0x43210) #define ILK_DPFC_FENCE_YOFF _MMIO(0x43218) #define ILK_DPFC_CHICKEN _MMIO(0x43224) +#define ILK_DPFC_DISABLE_DUMMY0 (1<<8) #define ILK_FBC_RT_BASE _MMIO(0x2128) #define ILK_FBC_RT_VALID (1<<0) #define SNB_FBC_FRONT_BUFFER (1<<1) @@ -6053,6 +6054,7 @@ enum skl_disp_power_wells { #define CHICKEN_PIPESL_1(pipe) _MMIO_PIPE(pipe, _CHICKEN_PIPESL_1_A, _CHICKEN_PIPESL_1_B) #define DISP_ARB_CTL _MMIO(0x45000) +#define DISP_FBC_MEMORY_WAKE (1<<31) #define DISP_TILE_SURFACE_SWIZZLING (1<<13) #define DISP_FBC_WM_DIS (1<<15) #define DISP_ARB_CTL2 _MMIO(0x45004) diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c index b2acb82b302b..6d9cf487ea40 100644 --- a/drivers/gpu/drm/i915/intel_pm.c +++ b/drivers/gpu/drm/i915/intel_pm.c @@ -70,8 +70,13 @@ static void gen9_init_clock_gating(struct drm_device *dev) I915_READ(GEN8_CHICKEN_DCPR_1) | MASK_WAKEMEM); /* WaFbcTurnOffFbcWatermark:skl,bxt,kbl */ - I915_WRITE(DISP_ARB_CTL, - I915_READ(DISP_ARB_CTL) | DISP_FBC_WM_DIS); + /* WaFbcWakeMemOn:skl,bxt,kbl */ + I915_WRITE(DISP_ARB_CTL, I915_READ(DISP_ARB_CTL) | + DISP_FBC_WM_DIS | + DISP_FBC_MEMORY_WAKE); + + I915_WRITE(ILK_DPFC_CHICKEN, I915_READ(ILK_DPFC_CHICKEN) | + ILK_DPFC_DISABLE_DUMMY0); } static void bxt_init_clock_gating(struct drm_device *dev)
Set bit 8 in 0x43224 to prevent screen corruption and system hangs on high memory bandwidth conditions. The same wa also suggest setting bit 31 on ARB_CTL. According to another workaround we gain better idle power savings when FBC is enabled. v2: use correct workaround name References: HSD#2137218, HSD#2227171, HSD#2136579, BSID#883 Cc: Paulo Zanoni <paulo.r.zanoni@intel.com> Signed-off-by: Mika Kuoppala <mika.kuoppala@intel.com> --- drivers/gpu/drm/i915/i915_reg.h | 2 ++ drivers/gpu/drm/i915/intel_pm.c | 9 +++++++-- 2 files changed, 9 insertions(+), 2 deletions(-)