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[27/27] drm/i915/gen9: Add WaFbcHighMemBwCorruptionAvoidance

Message ID 1465309159-30531-28-git-send-email-mika.kuoppala@intel.com (mailing list archive)
State New, archived
Headers show

Commit Message

Mika Kuoppala June 7, 2016, 2:19 p.m. UTC
Add this fbc related workaround for all gen9

Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Mika Kuoppala <mika.kuoppala@intel.com>
---
 drivers/gpu/drm/i915/i915_reg.h | 1 +
 drivers/gpu/drm/i915/intel_pm.c | 4 ++++
 2 files changed, 5 insertions(+)

Comments

Ville Syrjälä June 7, 2016, 4:04 p.m. UTC | #1
On Tue, Jun 07, 2016 at 05:19:19PM +0300, Mika Kuoppala wrote:
> Add this fbc related workaround for all gen9
> 
> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Signed-off-by: Mika Kuoppala <mika.kuoppala@intel.com>

Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

> ---
>  drivers/gpu/drm/i915/i915_reg.h | 1 +
>  drivers/gpu/drm/i915/intel_pm.c | 4 ++++
>  2 files changed, 5 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index f6a140b2c77c..81d1896f158c 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -2209,6 +2209,7 @@ enum skl_disp_power_wells {
>  #define ILK_DPFC_STATUS		_MMIO(0x43210)
>  #define ILK_DPFC_FENCE_YOFF	_MMIO(0x43218)
>  #define ILK_DPFC_CHICKEN	_MMIO(0x43224)
> +#define   ILK_DPFC_DISABLE_DUMMY0 (1<<8)
>  #define   ILK_DPFC_NUKE_ON_ANY_MODIFICATION	(1<<23)
>  #define ILK_FBC_RT_BASE		_MMIO(0x2128)
>  #define   ILK_FBC_RT_VALID	(1<<0)
> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> index 1464d7ba69d4..658a75659657 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -75,6 +75,10 @@ static void gen9_init_clock_gating(struct drm_device *dev)
>  	I915_WRITE(DISP_ARB_CTL, I915_READ(DISP_ARB_CTL) |
>  		   DISP_FBC_WM_DIS |
>  		   DISP_FBC_MEMORY_WAKE);
> +
> +	/* WaFbcHighMemBwCorruptionAvoidance:skl,bxt,kbl */
> +	I915_WRITE(ILK_DPFC_CHICKEN, I915_READ(ILK_DPFC_CHICKEN) |
> +		   ILK_DPFC_DISABLE_DUMMY0);
>  }
>  
>  static void bxt_init_clock_gating(struct drm_device *dev)
> -- 
> 2.7.4
Mika Kuoppala June 8, 2016, 2:29 p.m. UTC | #2
Ville Syrjälä <ville.syrjala@linux.intel.com> writes:

> [ text/plain ]
> On Tue, Jun 07, 2016 at 05:19:19PM +0300, Mika Kuoppala wrote:
>> Add this fbc related workaround for all gen9
>> 
>> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
>> Signed-off-by: Mika Kuoppala <mika.kuoppala@intel.com>
>
> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
>

All patches pushed to dinq. Ty all for review.

-Mika


>> ---
>>  drivers/gpu/drm/i915/i915_reg.h | 1 +
>>  drivers/gpu/drm/i915/intel_pm.c | 4 ++++
>>  2 files changed, 5 insertions(+)
>> 
>> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
>> index f6a140b2c77c..81d1896f158c 100644
>> --- a/drivers/gpu/drm/i915/i915_reg.h
>> +++ b/drivers/gpu/drm/i915/i915_reg.h
>> @@ -2209,6 +2209,7 @@ enum skl_disp_power_wells {
>>  #define ILK_DPFC_STATUS		_MMIO(0x43210)
>>  #define ILK_DPFC_FENCE_YOFF	_MMIO(0x43218)
>>  #define ILK_DPFC_CHICKEN	_MMIO(0x43224)
>> +#define   ILK_DPFC_DISABLE_DUMMY0 (1<<8)
>>  #define   ILK_DPFC_NUKE_ON_ANY_MODIFICATION	(1<<23)
>>  #define ILK_FBC_RT_BASE		_MMIO(0x2128)
>>  #define   ILK_FBC_RT_VALID	(1<<0)
>> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
>> index 1464d7ba69d4..658a75659657 100644
>> --- a/drivers/gpu/drm/i915/intel_pm.c
>> +++ b/drivers/gpu/drm/i915/intel_pm.c
>> @@ -75,6 +75,10 @@ static void gen9_init_clock_gating(struct drm_device *dev)
>>  	I915_WRITE(DISP_ARB_CTL, I915_READ(DISP_ARB_CTL) |
>>  		   DISP_FBC_WM_DIS |
>>  		   DISP_FBC_MEMORY_WAKE);
>> +
>> +	/* WaFbcHighMemBwCorruptionAvoidance:skl,bxt,kbl */
>> +	I915_WRITE(ILK_DPFC_CHICKEN, I915_READ(ILK_DPFC_CHICKEN) |
>> +		   ILK_DPFC_DISABLE_DUMMY0);
>>  }
>>  
>>  static void bxt_init_clock_gating(struct drm_device *dev)
>> -- 
>> 2.7.4
>
> -- 
> Ville Syrjälä
> Intel OTC
diff mbox

Patch

diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index f6a140b2c77c..81d1896f158c 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -2209,6 +2209,7 @@  enum skl_disp_power_wells {
 #define ILK_DPFC_STATUS		_MMIO(0x43210)
 #define ILK_DPFC_FENCE_YOFF	_MMIO(0x43218)
 #define ILK_DPFC_CHICKEN	_MMIO(0x43224)
+#define   ILK_DPFC_DISABLE_DUMMY0 (1<<8)
 #define   ILK_DPFC_NUKE_ON_ANY_MODIFICATION	(1<<23)
 #define ILK_FBC_RT_BASE		_MMIO(0x2128)
 #define   ILK_FBC_RT_VALID	(1<<0)
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 1464d7ba69d4..658a75659657 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -75,6 +75,10 @@  static void gen9_init_clock_gating(struct drm_device *dev)
 	I915_WRITE(DISP_ARB_CTL, I915_READ(DISP_ARB_CTL) |
 		   DISP_FBC_WM_DIS |
 		   DISP_FBC_MEMORY_WAKE);
+
+	/* WaFbcHighMemBwCorruptionAvoidance:skl,bxt,kbl */
+	I915_WRITE(ILK_DPFC_CHICKEN, I915_READ(ILK_DPFC_CHICKEN) |
+		   ILK_DPFC_DISABLE_DUMMY0);
 }
 
 static void bxt_init_clock_gating(struct drm_device *dev)