From patchwork Thu Jun 9 22:14:54 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Matt Roper X-Patchwork-Id: 9168497 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 72D7A604DB for ; Thu, 9 Jun 2016 22:15:50 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 641012833D for ; Thu, 9 Jun 2016 22:15:50 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 590AB28359; Thu, 9 Jun 2016 22:15:50 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.2 required=2.0 tests=BAYES_00, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id EDE882833D for ; Thu, 9 Jun 2016 22:15:49 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 01E426EC8B; Thu, 9 Jun 2016 22:15:49 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by gabe.freedesktop.org (Postfix) with ESMTP id 3347F6EC8B for ; Thu, 9 Jun 2016 22:15:47 +0000 (UTC) Received: from orsmga002.jf.intel.com ([10.7.209.21]) by orsmga101.jf.intel.com with ESMTP; 09 Jun 2016 15:15:47 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.26,447,1459839600"; d="scan'208";a="994624073" Received: from mdroper-hswdev.fm.intel.com (HELO mdroper-hswdev) ([10.1.134.210]) by orsmga002.jf.intel.com with ESMTP; 09 Jun 2016 15:15:46 -0700 Received: from mattrope by mdroper-hswdev with local (Exim 4.84_2) (envelope-from ) id 1bB8Es-0007uF-II; Thu, 09 Jun 2016 15:15:46 -0700 From: Matt Roper To: intel-gfx@lists.freedesktop.org Date: Thu, 9 Jun 2016 15:14:54 -0700 Message-Id: <1465510495-30302-3-git-send-email-matthew.d.roper@intel.com> X-Mailer: git-send-email 2.1.4 In-Reply-To: <1465510495-30302-1-git-send-email-matthew.d.roper@intel.com> References: <1465510495-30302-1-git-send-email-matthew.d.roper@intel.com> Subject: [Intel-gfx] [PATCH 2/3] drm/i915/gen9: Compute data rates for all planes on first commit X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Virus-Scanned: ClamAV using ClamSMTP When we sanitize our DDB and watermark info during the first atomic commit, we need to calculate the total data rate. Since we haven't explicitly added the planes for each CRTC to our atomic state, the total data rate calculation will try to use the cached values from a previous commit (which are 0 since there was no previous commit); this result is incorrect if we inherited any active planes from the BIOS. During our very first atomic commit, we need to explicitly add all active planes to the atomic state to ensure that valid data rate values are calculated for them. Subsequent commits will then have valid cached values to fall back on. Reported-by: Tvrtko Ursulin Cc: Tvrtko Ursulin Signed-off-by: Matt Roper Reviewed-by: Maarten Lankhorst --- drivers/gpu/drm/i915/intel_pm.c | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c index 0cd38ca..ba08639 100644 --- a/drivers/gpu/drm/i915/intel_pm.c +++ b/drivers/gpu/drm/i915/intel_pm.c @@ -3933,6 +3933,18 @@ skl_compute_ddb(struct drm_atomic_state *state) if (IS_ERR(cstate)) return PTR_ERR(cstate); + /* + * If this is our first commit after hw readout, we don't have + * valid data rate values cached. Add all planes to ensure we + * calculate a valid data rate. + */ + if (dev_priv->wm.distrust_bios_wm) { + ret = drm_atomic_add_affected_planes(state, + &intel_crtc->base); + if (ret) + return ret; + } + ret = skl_allocate_pipe_ddb(cstate, ddb); if (ret) return ret;