| Message ID | 1467072643-25563-1-git-send-email-rodrigo.vivi@intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
On Mon, 2016-06-27 at 17:10 -0700, Rodrigo Vivi wrote: > The spec has been updated adding new PCI IDs. > > v2: Avoid using "H" instead of HALO to keep names uniform - DK. > > Cc: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com> > Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> > --- > intel/intel_chipset.h | 14 ++++++++++---- > 1 file changed, 10 insertions(+), 4 deletions(-) > > diff --git a/intel/intel_chipset.h b/intel/intel_chipset.h > index e2554c3..6b8d4e9 100644 > --- a/intel/intel_chipset.h > +++ b/intel/intel_chipset.h > @@ -194,7 +194,9 @@ > #define PCI_CHIP_KABYLAKE_ULT_GT2 0x5916 > #define PCI_CHIP_KABYLAKE_ULT_GT1_5 0x5913 > #define PCI_CHIP_KABYLAKE_ULT_GT1 0x5906 > -#define PCI_CHIP_KABYLAKE_ULT_GT3 0x5926 > +#define PCI_CHIP_KABYLAKE_ULT_GT3_0 0x5923 > +#define PCI_CHIP_KABYLAKE_ULT_GT3_1 0x5926 > +#define PCI_CHIP_KABYLAKE_ULT_GT3_2 0x5927 > #define PCI_CHIP_KABYLAKE_ULT_GT2F 0x5921 > #define PCI_CHIP_KABYLAKE_ULX_GT1_5 0x5915 > #define PCI_CHIP_KABYLAKE_ULX_GT1 0x590E > @@ -206,7 +208,8 @@ > #define PCI_CHIP_KABYLAKE_HALO_GT2 0x591B > #define PCI_CHIP_KABYLAKE_HALO_GT4 0x593B > #define PCI_CHIP_KABYLAKE_HALO_GT3 0x592B > -#define PCI_CHIP_KABYLAKE_HALO_GT1 0x590B > +#define PCI_CHIP_KABYLAKE_HALO_GT1_0 0x5908 > +#define PCI_CHIP_KABYLAKE_HALO_GT1_1 0x590B > #define PCI_CHIP_KABYLAKE_SRV_GT2 0x591A > #define PCI_CHIP_KABYLAKE_SRV_GT3 0x592A > #define PCI_CHIP_KABYLAKE_SRV_GT1 0x590A > @@ -414,7 +417,8 @@ > (devid) == PCI_CHIP_KABYLAKE_ULT_GT1 || \ > (devid) == PCI_CHIP_KABYLAKE_ULX_GT1 || \ > (devid) == PCI_CHIP_KABYLAKE_DT_GT1 || \ > - (devid) == PCI_CHIP_KABYLAKE_HALO_GT1 || \ > + (devid) == PCI_CHIP_KABYLAKE_HALO_GT1_0 || \ > + (devid) == PCI_CHIP_KABYLAKE_HALO_GT1_1 || \ > (devid) == PCI_CHIP_KABYLAKE_SRV_GT1) > > #define IS_KBL_GT2(devid) ((devid) == PCI_CHIP_KABYLAKE_ULT_GT2 || \ > @@ -425,7 +429,9 @@ > (devid) == PCI_CHIP_KABYLAKE_SRV_GT2 || \ > (devid) == PCI_CHIP_KABYLAKE_WKS_GT2) > > -#define IS_KBL_GT3(devid) ((devid) == PCI_CHIP_KABYLAKE_ULT_GT3 || \ > +#define IS_KBL_GT3(devid) ((devid) == PCI_CHIP_KABYLAKE_ULT_GT3_0 || \ > + (devid) == PCI_CHIP_KABYLAKE_ULT_GT3_1 || \ > + (devid) == PCI_CHIP_KABYLAKE_ULT_GT3_2 || \ > (devid) == PCI_CHIP_KABYLAKE_HALO_GT3 || \ > (devid) == PCI_CHIP_KABYLAKE_SRV_GT3) > Checked against the spec, lgtm. Reviewed-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
diff --git a/intel/intel_chipset.h b/intel/intel_chipset.h index e2554c3..6b8d4e9 100644 --- a/intel/intel_chipset.h +++ b/intel/intel_chipset.h @@ -194,7 +194,9 @@ #define PCI_CHIP_KABYLAKE_ULT_GT2 0x5916 #define PCI_CHIP_KABYLAKE_ULT_GT1_5 0x5913 #define PCI_CHIP_KABYLAKE_ULT_GT1 0x5906 -#define PCI_CHIP_KABYLAKE_ULT_GT3 0x5926 +#define PCI_CHIP_KABYLAKE_ULT_GT3_0 0x5923 +#define PCI_CHIP_KABYLAKE_ULT_GT3_1 0x5926 +#define PCI_CHIP_KABYLAKE_ULT_GT3_2 0x5927 #define PCI_CHIP_KABYLAKE_ULT_GT2F 0x5921 #define PCI_CHIP_KABYLAKE_ULX_GT1_5 0x5915 #define PCI_CHIP_KABYLAKE_ULX_GT1 0x590E @@ -206,7 +208,8 @@ #define PCI_CHIP_KABYLAKE_HALO_GT2 0x591B #define PCI_CHIP_KABYLAKE_HALO_GT4 0x593B #define PCI_CHIP_KABYLAKE_HALO_GT3 0x592B -#define PCI_CHIP_KABYLAKE_HALO_GT1 0x590B +#define PCI_CHIP_KABYLAKE_HALO_GT1_0 0x5908 +#define PCI_CHIP_KABYLAKE_HALO_GT1_1 0x590B #define PCI_CHIP_KABYLAKE_SRV_GT2 0x591A #define PCI_CHIP_KABYLAKE_SRV_GT3 0x592A #define PCI_CHIP_KABYLAKE_SRV_GT1 0x590A @@ -414,7 +417,8 @@ (devid) == PCI_CHIP_KABYLAKE_ULT_GT1 || \ (devid) == PCI_CHIP_KABYLAKE_ULX_GT1 || \ (devid) == PCI_CHIP_KABYLAKE_DT_GT1 || \ - (devid) == PCI_CHIP_KABYLAKE_HALO_GT1 || \ + (devid) == PCI_CHIP_KABYLAKE_HALO_GT1_0 || \ + (devid) == PCI_CHIP_KABYLAKE_HALO_GT1_1 || \ (devid) == PCI_CHIP_KABYLAKE_SRV_GT1) #define IS_KBL_GT2(devid) ((devid) == PCI_CHIP_KABYLAKE_ULT_GT2 || \ @@ -425,7 +429,9 @@ (devid) == PCI_CHIP_KABYLAKE_SRV_GT2 || \ (devid) == PCI_CHIP_KABYLAKE_WKS_GT2) -#define IS_KBL_GT3(devid) ((devid) == PCI_CHIP_KABYLAKE_ULT_GT3 || \ +#define IS_KBL_GT3(devid) ((devid) == PCI_CHIP_KABYLAKE_ULT_GT3_0 || \ + (devid) == PCI_CHIP_KABYLAKE_ULT_GT3_1 || \ + (devid) == PCI_CHIP_KABYLAKE_ULT_GT3_2 || \ (devid) == PCI_CHIP_KABYLAKE_HALO_GT3 || \ (devid) == PCI_CHIP_KABYLAKE_SRV_GT3)
The spec has been updated adding new PCI IDs. v2: Avoid using "H" instead of HALO to keep names uniform - DK. Cc: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> --- intel/intel_chipset.h | 14 ++++++++++---- 1 file changed, 10 insertions(+), 4 deletions(-)