From patchwork Sun Jul 10 13:41:13 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: akash.goel@intel.com X-Patchwork-Id: 9222653 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id BB85060572 for ; Sun, 10 Jul 2016 13:28:20 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id AB8B023861 for ; Sun, 10 Jul 2016 13:28:20 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id A069D2705B; Sun, 10 Jul 2016 13:28:20 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.2 required=2.0 tests=BAYES_00, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 1D14F23861 for ; Sun, 10 Jul 2016 13:28:20 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id EBAF46E0CC; Sun, 10 Jul 2016 13:28:15 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by gabe.freedesktop.org (Postfix) with ESMTP id A596F6E0AF for ; Sun, 10 Jul 2016 13:28:10 +0000 (UTC) Received: from fmsmga003.fm.intel.com ([10.253.24.29]) by orsmga101.jf.intel.com with ESMTP; 10 Jul 2016 06:28:10 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.28,340,1464678000"; d="scan'208";a="732156183" Received: from akashgoe-desktop.iind.intel.com ([10.223.82.36]) by FMSMGA003.fm.intel.com with ESMTP; 10 Jul 2016 06:28:09 -0700 From: akash.goel@intel.com To: intel-gfx@lists.freedesktop.org Date: Sun, 10 Jul 2016 19:11:13 +0530 Message-Id: <1468158084-22028-7-git-send-email-akash.goel@intel.com> X-Mailer: git-send-email 1.9.2 In-Reply-To: <1468158084-22028-1-git-send-email-akash.goel@intel.com> References: <1468158084-22028-1-git-send-email-akash.goel@intel.com> Cc: Akash Goel Subject: [Intel-gfx] [PATCH 06/17] drm/i915: Handle log buffer flush interrupt event from GuC X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Virus-Scanned: ClamAV using ClamSMTP From: Sagar Arun Kamble GuC ukernel sends an interrupt to Host to flush the log buffer and expects Host to correspondingly update the read pointer information in the state structure, once it has consumed the log buffer contents by copying them to a file or buffer. Even if Host couldn't copy the contents, it can still update the read pointer so that logging state is not disturbed on GuC side. v2: - Use a dedicated workqueue for handling flush interrupt. (Tvrtko) - Reduce the overall log buffer copying time by skipping the copy of crash buffer area for regular cases and copying only the state structure data in first page. v3: - Create a vmalloc mapping of log buffer. (Chris) - Cover the flush acknowledgment under rpm get & put.(Chris) - Revert the change of skipping the copy of crash dump area, as not really needed, will be covered by subsequent patch. Signed-off-by: Sagar Arun Kamble Signed-off-by: Akash Goel --- drivers/gpu/drm/i915/i915_drv.c | 13 +++ drivers/gpu/drm/i915/i915_guc_submission.c | 148 +++++++++++++++++++++++++++++ drivers/gpu/drm/i915/i915_irq.c | 5 +- drivers/gpu/drm/i915/intel_guc.h | 3 + 4 files changed, 167 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c index b9a8117..25c6b9b 100644 --- a/drivers/gpu/drm/i915/i915_drv.c +++ b/drivers/gpu/drm/i915/i915_drv.c @@ -791,8 +791,20 @@ static int i915_workqueues_init(struct drm_i915_private *dev_priv) if (dev_priv->hotplug.dp_wq == NULL) goto out_free_wq; + if (HAS_GUC_SCHED(dev_priv)) { + /* Need a dedicated wq to process log buffer flush interrupts + * from GuC without much delay so as to avoid any loss of logs. + */ + dev_priv->guc.log.wq = + alloc_ordered_workqueue("i915-guc_log", 0); + if (dev_priv->guc.log.wq == NULL) + goto out_free_hotplug_dp_wq; + } + return 0; +out_free_hotplug_dp_wq: + destroy_workqueue(dev_priv->hotplug.dp_wq); out_free_wq: destroy_workqueue(dev_priv->wq); out_err: @@ -803,6 +815,7 @@ out_err: static void i915_workqueues_cleanup(struct drm_i915_private *dev_priv) { + destroy_workqueue(dev_priv->guc.log.wq); destroy_workqueue(dev_priv->hotplug.dp_wq); destroy_workqueue(dev_priv->wq); } diff --git a/drivers/gpu/drm/i915/i915_guc_submission.c b/drivers/gpu/drm/i915/i915_guc_submission.c index 0bac172..d3dbb8e 100644 --- a/drivers/gpu/drm/i915/i915_guc_submission.c +++ b/drivers/gpu/drm/i915/i915_guc_submission.c @@ -172,6 +172,15 @@ static int host2guc_sample_forcewake(struct intel_guc *guc, return host2guc_action(guc, data, ARRAY_SIZE(data)); } +static int host2guc_logbuffer_flush_complete(struct intel_guc *guc) +{ + u32 data[1]; + + data[0] = HOST2GUC_ACTION_LOG_BUFFER_FILE_FLUSH_COMPLETE; + + return host2guc_action(guc, data, 1); +} + /* * Initialise, update, or clear doorbell data shared with the GuC * @@ -825,6 +834,123 @@ err: return NULL; } +static void guc_move_to_next_buf(struct intel_guc *guc) +{ + return; +} + +static void* guc_get_write_buffer(struct intel_guc *guc) +{ + return NULL; +} + +static void guc_read_update_log_buffer(struct drm_device *dev) +{ + struct drm_i915_private *dev_priv = dev->dev_private; + struct intel_guc *guc = &dev_priv->guc; + struct guc_log_buffer_state *log_buffer_state, *log_buffer_copy_state; + struct guc_log_buffer_state log_buffer_state_local; + void *src_data_ptr, *dst_data_ptr; + u32 i, buffer_size; + + if (!guc->log.obj || !guc->log.buf_addr) + return; + + log_buffer_state = src_data_ptr = guc->log.buf_addr; + + /* Get the pointer to local buffer to store the logs */ + dst_data_ptr = log_buffer_copy_state = guc_get_write_buffer(guc); + + /* Actual logs are present from the 2nd page */ + src_data_ptr += PAGE_SIZE; + dst_data_ptr += PAGE_SIZE; + + for (i = 0; i < GUC_MAX_LOG_BUFFER; i++) { + log_buffer_state_local = *log_buffer_state; + buffer_size = log_buffer_state_local.size; + + if (log_buffer_copy_state) { + /* First copy the state structure */ + memcpy(log_buffer_copy_state, &log_buffer_state_local, + sizeof(struct guc_log_buffer_state)); + + /* The write pointer could have been updated by the GuC + * firmware, after sending the flush interrupt to Host, + * for consistency set the write pointer value to same + * value of sampled_write_ptr in the snapshot buffer. + */ + log_buffer_copy_state->write_ptr = + log_buffer_copy_state->sampled_write_ptr; + + log_buffer_copy_state++; + + /* Now copy the actual logs */ + memcpy(dst_data_ptr, src_data_ptr, buffer_size); + + src_data_ptr += buffer_size; + dst_data_ptr += buffer_size; + } + + /* FIXME: invalidate/flush for log buffer needed */ + + /* Update the read pointer in the shared log buffer */ + log_buffer_state->read_ptr = + log_buffer_state_local.sampled_write_ptr; + + /* Clear the 'flush to file' flag */ + log_buffer_state->flush_to_file = 0; + log_buffer_state++; + } + + if (log_buffer_copy_state) + guc_move_to_next_buf(guc); +} + +static void guc_log_cleanup(struct drm_i915_private *dev_priv) +{ + struct intel_guc *guc = &dev_priv->guc; + + lockdep_assert_held(&dev_priv->drm.struct_mutex); + + if (i915.guc_log_level < 0) + return; + + /* First disable the flush interrupt */ + gen9_disable_guc_interrupts(dev_priv); + + if (guc->log.buf_addr) + i915_gem_object_unpin_map(guc->log.obj); + + guc->log.buf_addr = NULL; +} + +static int guc_create_log_extras(struct intel_guc *guc) +{ + struct drm_i915_private *dev_priv = guc_to_i915(guc); + void *vaddr; + int ret; + + lockdep_assert_held(&dev_priv->drm.struct_mutex); + + /* Nothing to do */ + if (i915.guc_log_level < 0) + return 0; + + if (!guc->log.buf_addr) { + /* Create a vmalloc mapping of log buffer pages */ + vaddr = i915_gem_object_pin_map(guc->log.obj); + if (IS_ERR(vaddr)) { + ret = PTR_ERR(vaddr); + DRM_ERROR("Couldn't map log buffer pages %d\n", ret); + return ret; + } + + guc->log.buf_addr = vaddr; + } + + return 0; +} + static void guc_create_log(struct intel_guc *guc) { struct drm_i915_private *dev_priv = guc_to_i915(guc); @@ -851,6 +977,13 @@ static void guc_create_log(struct intel_guc *guc) } guc->log.obj = obj; + + if (guc_create_log_extras(guc)) { + gem_release_guc_obj(guc->log.obj); + guc->log.obj = NULL; + i915.guc_log_level = -1; + return; + } } /* each allocated unit is a page */ @@ -1021,6 +1154,7 @@ void i915_guc_submission_fini(struct drm_i915_private *dev_priv) gem_release_guc_obj(dev_priv->guc.ads_obj); guc->ads_obj = NULL; + guc_log_cleanup(dev_priv); gem_release_guc_obj(dev_priv->guc.log.obj); guc->log.obj = NULL; @@ -1084,3 +1218,17 @@ int intel_guc_resume(struct drm_device *dev) return host2guc_action(guc, data, ARRAY_SIZE(data)); } + +void i915_guc_capture_logs(struct drm_device *dev) +{ + struct drm_i915_private *dev_priv = dev->dev_private; + + guc_read_update_log_buffer(dev); + + /* Generally device is expected to be active only at this + * time, so get/put should be really quick. + */ + intel_runtime_pm_get(dev_priv); + host2guc_logbuffer_flush_complete(&dev_priv->guc); + intel_runtime_pm_put(dev_priv); +} diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c index fd73c94..f90d3c6 100644 --- a/drivers/gpu/drm/i915/i915_irq.c +++ b/drivers/gpu/drm/i915/i915_irq.c @@ -1221,7 +1221,7 @@ static void gen9_guc2host_events_work(struct work_struct *work) } spin_unlock_irq(&dev_priv->irq_lock); - /* TODO: Handle the events for which GuC interrupted host */ + i915_guc_capture_logs(&dev_priv->drm); } /** @@ -1707,7 +1707,8 @@ static void gen9_guc_irq_handler(struct drm_i915_private *dev_priv, u32 gt_iir) I915_READ(SOFT_SCRATCH(15)) & ~msg); /* Handle flush interrupt event in bottom half */ - queue_work(dev_priv->wq, &dev_priv->guc.events_work); + queue_work(dev_priv->guc.log.wq, + &dev_priv->guc.events_work); } } spin_unlock(&dev_priv->irq_lock); diff --git a/drivers/gpu/drm/i915/intel_guc.h b/drivers/gpu/drm/i915/intel_guc.h index 2663b41..d4f0fae 100644 --- a/drivers/gpu/drm/i915/intel_guc.h +++ b/drivers/gpu/drm/i915/intel_guc.h @@ -125,6 +125,8 @@ struct intel_guc_fw { struct intel_guc_log { uint32_t flags; struct drm_i915_gem_object *obj; + struct workqueue_struct *wq; + void *buf_addr; }; struct intel_guc { @@ -171,5 +173,6 @@ int i915_guc_wq_check_space(struct drm_i915_gem_request *rq); int i915_guc_submit(struct drm_i915_gem_request *rq); void i915_guc_submission_disable(struct drm_i915_private *dev_priv); void i915_guc_submission_fini(struct drm_i915_private *dev_priv); +void i915_guc_capture_logs(struct drm_device *dev); #endif