| Message ID | 1468505704-17391-1-git-send-email-daniel.vetter@ffwll.ch (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
On 14/07/16 15:15, Daniel Vetter wrote: > I forgot to remove these when reworking the firmware loading sequence > last year. The new sequence is that we load firmware, and if it's not > there we entirely (and permanently) fail dmc setup. > > Reported-by: Dave Gordon <david.s.gordon@intel.com> > Signed-off-by: Daniel Vetter <daniel.vetter@intel.com> > --- > drivers/gpu/drm/i915/intel_csr.c | 7 ------- > 1 file changed, 7 deletions(-) > > diff --git a/drivers/gpu/drm/i915/intel_csr.c b/drivers/gpu/drm/i915/intel_csr.c > index c3b33a10c15c..1ea0e1f43397 100644 > --- a/drivers/gpu/drm/i915/intel_csr.c > +++ b/drivers/gpu/drm/i915/intel_csr.c > @@ -32,13 +32,6 @@ > * onwards to drive newly added DMC (Display microcontroller) in display > * engine to save and restore the state of display engine when it enter into > * low-power state and comes back to normal. > - * > - * Firmware loading status will be one of the below states: FW_UNINITIALIZED, > - * FW_LOADED, FW_FAILED. > - * > - * Once the firmware is written into the registers status will be moved from > - * FW_UNINITIALIZED to FW_LOADED and for any erroneous condition status will > - * be moved to FW_FAILED. > */ > > #define I915_CSR_KBL "i915/kbl_dmc_ver1_01.bin" LGTM. Reviewed-by: Dave Gordon <david.s.gordon@intel.com>
On Tue, Jul 19, 2016 at 07:43:56PM +0100, Dave Gordon wrote: > On 14/07/16 15:15, Daniel Vetter wrote: > > I forgot to remove these when reworking the firmware loading sequence > > last year. The new sequence is that we load firmware, and if it's not > > there we entirely (and permanently) fail dmc setup. > > > > Reported-by: Dave Gordon <david.s.gordon@intel.com> > > Signed-off-by: Daniel Vetter <daniel.vetter@intel.com> > > --- > > drivers/gpu/drm/i915/intel_csr.c | 7 ------- > > 1 file changed, 7 deletions(-) > > > > diff --git a/drivers/gpu/drm/i915/intel_csr.c b/drivers/gpu/drm/i915/intel_csr.c > > index c3b33a10c15c..1ea0e1f43397 100644 > > --- a/drivers/gpu/drm/i915/intel_csr.c > > +++ b/drivers/gpu/drm/i915/intel_csr.c > > @@ -32,13 +32,6 @@ > > * onwards to drive newly added DMC (Display microcontroller) in display > > * engine to save and restore the state of display engine when it enter into > > * low-power state and comes back to normal. > > - * > > - * Firmware loading status will be one of the below states: FW_UNINITIALIZED, > > - * FW_LOADED, FW_FAILED. > > - * > > - * Once the firmware is written into the registers status will be moved from > > - * FW_UNINITIALIZED to FW_LOADED and for any erroneous condition status will > > - * be moved to FW_FAILED. > > */ > > > > #define I915_CSR_KBL "i915/kbl_dmc_ver1_01.bin" > > LGTM. > > Reviewed-by: Dave Gordon <david.s.gordon@intel.com> Applied, thanks for the review. -Daniel
diff --git a/drivers/gpu/drm/i915/intel_csr.c b/drivers/gpu/drm/i915/intel_csr.c index c3b33a10c15c..1ea0e1f43397 100644 --- a/drivers/gpu/drm/i915/intel_csr.c +++ b/drivers/gpu/drm/i915/intel_csr.c @@ -32,13 +32,6 @@ * onwards to drive newly added DMC (Display microcontroller) in display * engine to save and restore the state of display engine when it enter into * low-power state and comes back to normal. - * - * Firmware loading status will be one of the below states: FW_UNINITIALIZED, - * FW_LOADED, FW_FAILED. - * - * Once the firmware is written into the registers status will be moved from - * FW_UNINITIALIZED to FW_LOADED and for any erroneous condition status will - * be moved to FW_FAILED. */ #define I915_CSR_KBL "i915/kbl_dmc_ver1_01.bin"
I forgot to remove these when reworking the firmware loading sequence last year. The new sequence is that we load firmware, and if it's not there we entirely (and permanently) fail dmc setup. Reported-by: Dave Gordon <david.s.gordon@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@intel.com> --- drivers/gpu/drm/i915/intel_csr.c | 7 ------- 1 file changed, 7 deletions(-)