diff mbox

[09/23] drm/i915: Move HAS_RESOURCE_STREAMER definition to platform definition

Message ID 1469036435-18918-10-git-send-email-carlos.santa@intel.com (mailing list archive)
State New, archived
Headers show

Commit Message

Santa, Carlos July 20, 2016, 5:40 p.m. UTC
Moving all GPU features to the platform struct definition allows for
	- standard place when adding new features from new platforms
	- possible to see supported features when dumping struct
	  definitions

Signed-off-by: Carlos Santa <carlos.santa@intel.com>
---
 drivers/gpu/drm/i915/i915_drv.h | 4 ++--
 drivers/gpu/drm/i915/i915_pci.c | 5 ++++-
 2 files changed, 6 insertions(+), 3 deletions(-)

Comments

Rodrigo Vivi July 20, 2016, 9:14 p.m. UTC | #1
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>

On Wed, Jul 20, 2016 at 10:40 AM, Carlos Santa <carlos.santa@intel.com> wrote:
> Moving all GPU features to the platform struct definition allows for
>         - standard place when adding new features from new platforms
>         - possible to see supported features when dumping struct
>           definitions
>
> Signed-off-by: Carlos Santa <carlos.santa@intel.com>
> ---
>  drivers/gpu/drm/i915/i915_drv.h | 4 ++--
>  drivers/gpu/drm/i915/i915_pci.c | 5 ++++-
>  2 files changed, 6 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index 2ba441e..a326a88 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -775,6 +775,7 @@ struct intel_csr {
>         func(has_guc) sep \
>         func(has_guc_ucode) sep \
>         func(has_guc_sched) sep \
> +       func(has_resource_streamer) sep \
>         func(has_pipe_cxsr) sep \
>         func(has_hotplug) sep \
>         func(cursor_needs_physical) sep \
> @@ -2869,8 +2870,7 @@ struct drm_i915_cmd_table {
>  #define HAS_GUC_UCODE(dev)     (INTEL_INFO(dev)->has_guc_ucode)
>  #define HAS_GUC_SCHED(dev)     (INTEL_INFO(dev)->has_guc_sched)
>
> -#define HAS_RESOURCE_STREAMER(dev) (IS_HASWELL(dev) || \
> -                                   INTEL_INFO(dev)->gen >= 8)
> +#define HAS_RESOURCE_STREAMER(dev) (INTEL_INFO(dev)->has_resource_streamer)
>
>  #define HAS_CORE_RING_FREQ(dev)        (INTEL_INFO(dev)->has_core_ring_freq)
>
> diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
> index f2cb5c3..f59ad4b 100644
> --- a/drivers/gpu/drm/i915/i915_pci.c
> +++ b/drivers/gpu/drm/i915/i915_pci.c
> @@ -268,7 +268,8 @@ static const struct intel_device_info intel_valleyview_d_info = {
>         .has_ddi = 1, \
>         .has_fpga_dbg = 1, \
>         .has_psr = 1, \
> -       .has_runtime_pm = 1
> +       .has_runtime_pm = 1, \
> +       .has_resource_streamer = 1
>
>  static const struct intel_device_info intel_haswell_d_info = {
>         HSW_FEATURES,
> @@ -318,6 +319,7 @@ static const struct intel_device_info intel_cherryview_info = {
>         .is_cherryview = 1,
>         .has_psr = 1,
>         .has_runtime_pm = 1,
> +       .has_resource_streamer = 1,
>         .display_mmio_offset = VLV_DISPLAY_BASE,
>         GEN_CHV_PIPEOFFSETS,
>         CURSOR_OFFSETS,
> @@ -355,6 +357,7 @@ static const struct intel_device_info intel_broxton_info = {
>         .has_fbc = 1,
>         .has_runtime_pm = 1,
>         .has_pooled_eu = 0,
> +       .has_resource_streamer = 1,
>         GEN_DEFAULT_PIPEOFFSETS,
>         IVB_CURSOR_OFFSETS,
>         BDW_COLORS,
> --
> 1.9.1
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
diff mbox

Patch

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 2ba441e..a326a88 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -775,6 +775,7 @@  struct intel_csr {
 	func(has_guc) sep \
 	func(has_guc_ucode) sep \
 	func(has_guc_sched) sep \
+	func(has_resource_streamer) sep \
 	func(has_pipe_cxsr) sep \
 	func(has_hotplug) sep \
 	func(cursor_needs_physical) sep \
@@ -2869,8 +2870,7 @@  struct drm_i915_cmd_table {
 #define HAS_GUC_UCODE(dev)	(INTEL_INFO(dev)->has_guc_ucode)
 #define HAS_GUC_SCHED(dev)	(INTEL_INFO(dev)->has_guc_sched)
 
-#define HAS_RESOURCE_STREAMER(dev) (IS_HASWELL(dev) || \
-				    INTEL_INFO(dev)->gen >= 8)
+#define HAS_RESOURCE_STREAMER(dev) (INTEL_INFO(dev)->has_resource_streamer)
 
 #define HAS_CORE_RING_FREQ(dev)	(INTEL_INFO(dev)->has_core_ring_freq)
 
diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
index f2cb5c3..f59ad4b 100644
--- a/drivers/gpu/drm/i915/i915_pci.c
+++ b/drivers/gpu/drm/i915/i915_pci.c
@@ -268,7 +268,8 @@  static const struct intel_device_info intel_valleyview_d_info = {
 	.has_ddi = 1, \
 	.has_fpga_dbg = 1, \
 	.has_psr = 1, \
-	.has_runtime_pm = 1
+	.has_runtime_pm = 1, \
+	.has_resource_streamer = 1
 
 static const struct intel_device_info intel_haswell_d_info = {
 	HSW_FEATURES,
@@ -318,6 +319,7 @@  static const struct intel_device_info intel_cherryview_info = {
 	.is_cherryview = 1,
 	.has_psr = 1,
 	.has_runtime_pm = 1,
+	.has_resource_streamer = 1,
 	.display_mmio_offset = VLV_DISPLAY_BASE,
 	GEN_CHV_PIPEOFFSETS,
 	CURSOR_OFFSETS,
@@ -355,6 +357,7 @@  static const struct intel_device_info intel_broxton_info = {
 	.has_fbc = 1,
 	.has_runtime_pm = 1,
 	.has_pooled_eu = 0,
+	.has_resource_streamer = 1,
 	GEN_DEFAULT_PIPEOFFSETS,
 	IVB_CURSOR_OFFSETS,
 	BDW_COLORS,