| Message ID | 1469036435-18918-15-git-send-email-carlos.santa@intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
On Wed, Jul 20, 2016 at 10:40 AM, Carlos Santa <carlos.santa@intel.com> wrote: > Moving all GPU features to the platform struct definition allows for > - standard place when adding new features from new platforms > - possible to see supported features when dumping struct > definitions > > Signed-off-by: Carlos Santa <carlos.santa@intel.com> > --- > drivers/gpu/drm/i915/i915_drv.h | 3 ++- > drivers/gpu/drm/i915/i915_pci.c | 6 ++++++ > 2 files changed, 8 insertions(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h > index 27f23cc5..26283b5 100644 > --- a/drivers/gpu/drm/i915/i915_drv.h > +++ b/drivers/gpu/drm/i915/i915_drv.h > @@ -778,6 +778,7 @@ struct intel_csr { > func(has_rc6) sep \ > func(has_rc6p) sep \ > func(has_dp_mst) sep \ > + func(has_aux_irq) sep \ > func(has_resource_streamer) sep \ > func(has_pipe_cxsr) sep \ > func(has_hotplug) sep \ > @@ -2835,7 +2836,7 @@ struct drm_i915_cmd_table { > * legacy irq no. is shared with another device. The kernel then disables that > * interrupt source and so prevents the other device from working properly. > */ > -#define HAS_AUX_IRQ(dev) (INTEL_INFO(dev)->gen >= 5) > +#define HAS_AUX_IRQ(dev) (INTEL_INFO(dev)->has_aux_irq) > #define HAS_GMBUS_IRQ(dev) (INTEL_INFO(dev)->gen >= 5) > > /* With the 945 and later, Y tiling got adjusted so that it was 32 128-byte > diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c > index 3844840..9a5cb33 100644 > --- a/drivers/gpu/drm/i915/i915_pci.c > +++ b/drivers/gpu/drm/i915/i915_pci.c > @@ -180,6 +180,7 @@ static const struct intel_device_info intel_pineview_info = { > #define GEN5_FEATURES \ > .gen = 5, .num_pipes = 2, \ > .need_gfx_hws = 1, .has_hotplug = 1, \ > + .has_aux_irq = 1, \ > .ring_mask = RENDER_RING | BSD_RING, \ > GEN_DEFAULT_PIPEOFFSETS, \ > CURSOR_OFFSETS > @@ -203,6 +204,7 @@ static const struct intel_device_info intel_ironlake_m_info = { > .has_core_ring_freq = 1, \ > .has_rc6 = 1, \ > .has_rc6p = 1, \ > + .has_aux_irq = 1, \ GEN6 based on GEN5 should come first > .ring_mask = RENDER_RING | BSD_RING | BLT_RING, \ > .has_llc = 1, \ > GEN_DEFAULT_PIPEOFFSETS, \ > @@ -223,6 +225,7 @@ static const struct intel_device_info intel_sandybridge_m_info = { > .has_fbc = 1, \ > .has_core_ring_freq = 1, \ > .has_rc6 = 1, \ > + .has_aux_irq = 1, \ GEN7 based on GEN6 should come first > .ring_mask = RENDER_RING | BSD_RING | BLT_RING, \ > .has_llc = 1, \ > GEN_DEFAULT_PIPEOFFSETS, \ > @@ -256,6 +259,7 @@ static const struct intel_device_info intel_ivybridge_q_info = { > .has_psr = 1, \ > .has_runtime_pm = 1, \ > .has_rc6 = 1, \ > + .has_aux_irq = 1, \ > .need_gfx_hws = 1, .has_hotplug = 1, \ > .ring_mask = RENDER_RING | BSD_RING | BLT_RING, \ > .display_mmio_offset = VLV_DISPLAY_BASE, \ > @@ -334,6 +338,7 @@ static const struct intel_device_info intel_cherryview_info = { > .has_resource_streamer = 1, > .has_rc6 = 1, > .has_dp_mst = 1, > + .has_aux_irq = 1, > .display_mmio_offset = VLV_DISPLAY_BASE, > GEN_CHV_PIPEOFFSETS, > CURSOR_OFFSETS, > @@ -373,6 +378,7 @@ static const struct intel_device_info intel_broxton_info = { > .has_pooled_eu = 0, > .has_resource_streamer = 1, > .has_rc6 = 1, > + .has_aux_irq = 1, > GEN_DEFAULT_PIPEOFFSETS, > IVB_CURSOR_OFFSETS, > BDW_COLORS, > -- > 1.9.1 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/intel-gfx
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index 27f23cc5..26283b5 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -778,6 +778,7 @@ struct intel_csr { func(has_rc6) sep \ func(has_rc6p) sep \ func(has_dp_mst) sep \ + func(has_aux_irq) sep \ func(has_resource_streamer) sep \ func(has_pipe_cxsr) sep \ func(has_hotplug) sep \ @@ -2835,7 +2836,7 @@ struct drm_i915_cmd_table { * legacy irq no. is shared with another device. The kernel then disables that * interrupt source and so prevents the other device from working properly. */ -#define HAS_AUX_IRQ(dev) (INTEL_INFO(dev)->gen >= 5) +#define HAS_AUX_IRQ(dev) (INTEL_INFO(dev)->has_aux_irq) #define HAS_GMBUS_IRQ(dev) (INTEL_INFO(dev)->gen >= 5) /* With the 945 and later, Y tiling got adjusted so that it was 32 128-byte diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c index 3844840..9a5cb33 100644 --- a/drivers/gpu/drm/i915/i915_pci.c +++ b/drivers/gpu/drm/i915/i915_pci.c @@ -180,6 +180,7 @@ static const struct intel_device_info intel_pineview_info = { #define GEN5_FEATURES \ .gen = 5, .num_pipes = 2, \ .need_gfx_hws = 1, .has_hotplug = 1, \ + .has_aux_irq = 1, \ .ring_mask = RENDER_RING | BSD_RING, \ GEN_DEFAULT_PIPEOFFSETS, \ CURSOR_OFFSETS @@ -203,6 +204,7 @@ static const struct intel_device_info intel_ironlake_m_info = { .has_core_ring_freq = 1, \ .has_rc6 = 1, \ .has_rc6p = 1, \ + .has_aux_irq = 1, \ .ring_mask = RENDER_RING | BSD_RING | BLT_RING, \ .has_llc = 1, \ GEN_DEFAULT_PIPEOFFSETS, \ @@ -223,6 +225,7 @@ static const struct intel_device_info intel_sandybridge_m_info = { .has_fbc = 1, \ .has_core_ring_freq = 1, \ .has_rc6 = 1, \ + .has_aux_irq = 1, \ .ring_mask = RENDER_RING | BSD_RING | BLT_RING, \ .has_llc = 1, \ GEN_DEFAULT_PIPEOFFSETS, \ @@ -256,6 +259,7 @@ static const struct intel_device_info intel_ivybridge_q_info = { .has_psr = 1, \ .has_runtime_pm = 1, \ .has_rc6 = 1, \ + .has_aux_irq = 1, \ .need_gfx_hws = 1, .has_hotplug = 1, \ .ring_mask = RENDER_RING | BSD_RING | BLT_RING, \ .display_mmio_offset = VLV_DISPLAY_BASE, \ @@ -334,6 +338,7 @@ static const struct intel_device_info intel_cherryview_info = { .has_resource_streamer = 1, .has_rc6 = 1, .has_dp_mst = 1, + .has_aux_irq = 1, .display_mmio_offset = VLV_DISPLAY_BASE, GEN_CHV_PIPEOFFSETS, CURSOR_OFFSETS, @@ -373,6 +378,7 @@ static const struct intel_device_info intel_broxton_info = { .has_pooled_eu = 0, .has_resource_streamer = 1, .has_rc6 = 1, + .has_aux_irq = 1, GEN_DEFAULT_PIPEOFFSETS, IVB_CURSOR_OFFSETS, BDW_COLORS,
Moving all GPU features to the platform struct definition allows for - standard place when adding new features from new platforms - possible to see supported features when dumping struct definitions Signed-off-by: Carlos Santa <carlos.santa@intel.com> --- drivers/gpu/drm/i915/i915_drv.h | 3 ++- drivers/gpu/drm/i915/i915_pci.c | 6 ++++++ 2 files changed, 8 insertions(+), 1 deletion(-)