@@ -779,6 +779,7 @@ struct intel_csr {
func(has_resource_streamer) sep \
func(has_rc6) sep \
func(has_rc6p) sep \
+ func(has_dp_mst) sep \
func(has_pipe_cxsr) sep \
func(has_hotplug) sep \
func(cursor_needs_physical) sep \
@@ -2736,8 +2737,7 @@ struct drm_i915_cmd_table {
#define HAS_IPS(dev) (IS_HSW_ULT(dev) || IS_BROADWELL(dev))
-#define HAS_DP_MST(dev) (IS_HASWELL(dev) || IS_BROADWELL(dev) || \
- INTEL_INFO(dev)->gen >= 9)
+#define HAS_DP_MST(dev) (INTEL_INFO(dev)->has_dp_mst)
#define HAS_DDI(dev) (INTEL_INFO(dev)->has_ddi)
#define HAS_FPGA_DBG_UNCLAIMED(dev) (INTEL_INFO(dev)->has_fpga_dbg)
@@ -270,6 +270,7 @@ static const struct intel_device_info intel_valleyview_d_info = {
.has_psr = 1, \
.has_runtime_pm = 1, \
.has_resource_streamer = 1, \
+ .has_dp_mst = 1, \
.has_rc6p = 0 /*RC6p excludes HSW*/
static const struct intel_device_info intel_haswell_d_info = {
@@ -357,6 +358,7 @@ static const struct intel_device_info intel_broxton_info = {
.has_csr = 1,
.has_resource_streamer = 1,
.has_rc6 = 1,
+ .has_dp_mst = 1,
GEN_DEFAULT_PIPEOFFSETS,
IVB_CURSOR_OFFSETS,
BDW_COLORS,
Moving all GPU features to the platform struct definition allows for - standard place when adding new features from new platforms - possible to see supported features when dumping struct definitions Signed-off-by: Carlos Santa <carlos.santa@intel.com> --- drivers/gpu/drm/i915/i915_drv.h | 4 ++-- drivers/gpu/drm/i915/i915_pci.c | 2 ++ 2 files changed, 4 insertions(+), 2 deletions(-)