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[v2,21/21] drm/i915: Move HAS_GMCH_DISPLAY definition to platform

Message ID 1469733156-14066-22-git-send-email-carlos.santa@intel.com (mailing list archive)
State New, archived
Headers show

Commit Message

Santa, Carlos July 28, 2016, 7:12 p.m. UTC
Moving all GPU features to the platform definition allows for
	- standard place when adding new features from new platforms
	- possible to see supported features when dumping struct
	  definitions

Signed-off-by: Carlos Santa <carlos.santa@intel.com>
---
 drivers/gpu/drm/i915/i915_drv.h | 4 ++--
 drivers/gpu/drm/i915/i915_pci.c | 4 ++++
 2 files changed, 6 insertions(+), 2 deletions(-)
diff mbox

Patch

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 11fe560..dacf5fd 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -786,6 +786,7 @@  struct intel_csr {
 	func(has_hw_contexts) sep \
 	func(has_logical_ring_contexts) sep \
 	func(has_l3_dpf) sep \
+	func(has_gmch_display) sep \
 	func(has_pipe_cxsr) sep \
 	func(has_hotplug) sep \
 	func(cursor_needs_physical) sep \
@@ -2793,8 +2794,7 @@  struct drm_i915_cmd_table {
 #define HAS_PCH_NOP(dev) (INTEL_PCH_TYPE(dev) == PCH_NOP)
 #define HAS_PCH_SPLIT(dev) (INTEL_PCH_TYPE(dev) != PCH_NONE)
 
-#define HAS_GMCH_DISPLAY(dev) (INTEL_INFO(dev)->gen < 5 || \
-			       IS_VALLEYVIEW(dev) || IS_CHERRYVIEW(dev))
+#define HAS_GMCH_DISPLAY(dev) (INTEL_INFO(dev)->has_gmch_display)
 
 /* DPF == dynamic parity feature */
 #define HAS_L3_DPF(dev) (INTEL_INFO(dev)->has_l3_dpf)
diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
index 34e2226..3665183 100644
--- a/drivers/gpu/drm/i915/i915_pci.c
+++ b/drivers/gpu/drm/i915/i915_pci.c
@@ -57,6 +57,7 @@ 
 #define GEN2_FEATURES \
 	.gen=2, .num_pipes = 2, \
 	.has_overlay = 1, .overlay_needs_physical = 1, \
+	.has_gmch_display = 1, \
 	.ring_mask = RENDER_RING, \
 	GEN_DEFAULT_PIPEOFFSETS, \
 	CURSOR_OFFSETS
@@ -86,6 +87,7 @@  static const struct intel_device_info intel_i865g_info = {
 #define GEN3_FEATURES \
 	.gen = 3, .num_pipes = 2, \
 	.has_fw_blc = 1, \
+	.has_gmch_display = 1, \
 	.ring_mask = RENDER_RING, \
 	GEN_DEFAULT_PIPEOFFSETS, \
 	CURSOR_OFFSETS
@@ -243,6 +245,7 @@  static const struct intel_device_info intel_ivybridge_q_info = {
 	.has_gmbus_irq = 1, \
 	.has_fw_blc = 1, \
 	.has_hw_contexts = 1, \
+	.has_fw_blc = 1, \
 	.need_gfx_hws = 1, .has_hotplug = 1, \
 	.ring_mask = RENDER_RING | BSD_RING | BLT_RING, \
 	.display_mmio_offset = VLV_DISPLAY_BASE, \
@@ -329,6 +332,7 @@  static const struct intel_device_info intel_cherryview_info = {
 	.has_fw_blc = 1,
 	.has_hw_contexts = 1,
 	.has_logical_ring_contexts = 1,
+	.has_gmch_display = 1,
 	.display_mmio_offset = VLV_DISPLAY_BASE,
 	GEN_CHV_PIPEOFFSETS,
 	CURSOR_OFFSETS,