From patchwork Thu Aug 4 03:07:39 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dhinakaran Pandiyan X-Patchwork-Id: 9262565 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id C81DE60754 for ; Thu, 4 Aug 2016 02:54:54 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id BAF1A27DF9 for ; Thu, 4 Aug 2016 02:54:54 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id AFC4527F9E; Thu, 4 Aug 2016 02:54:54 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.2 required=2.0 tests=BAYES_00, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 1269127DF9 for ; Thu, 4 Aug 2016 02:54:54 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 5BAFF6E1A3; Thu, 4 Aug 2016 02:54:48 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga11.intel.com (mga11.intel.com [192.55.52.93]) by gabe.freedesktop.org (Postfix) with ESMTP id 808986E124; Thu, 4 Aug 2016 02:54:37 +0000 (UTC) Received: from orsmga003.jf.intel.com ([10.7.209.27]) by fmsmga102.fm.intel.com with ESMTP; 03 Aug 2016 19:54:38 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.28,469,1464678000"; d="scan'208";a="859394091" Received: from skynet.jf.intel.com ([10.54.75.148]) by orsmga003.jf.intel.com with ESMTP; 03 Aug 2016 19:54:37 -0700 From: Dhinakaran Pandiyan To: intel-gfx@lists.freedesktop.org Date: Wed, 3 Aug 2016 20:07:39 -0700 Message-Id: <1470280061-640-3-git-send-email-dhinakaran.pandiyan@intel.com> X-Mailer: git-send-email 2.5.0 In-Reply-To: <1470280061-640-1-git-send-email-dhinakaran.pandiyan@intel.com> References: <1470280061-640-1-git-send-email-dhinakaran.pandiyan@intel.com> Cc: Dhinakaran Pandiyan , dri-devel@lists.freedesktop.org Subject: [Intel-gfx] [PATCH 2/4] drm/i915/dp: Switch to using the DRM function for reading DP link status X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Virus-Scanned: ClamAV using ClamSMTP Since a DRM function that reads link DP link status is available, let's use that instead of the i915 clone. Signed-off-by: Dhinakaran Pandiyan --- drivers/gpu/drm/i915/intel_dp.c | 15 +++------------ drivers/gpu/drm/i915/intel_dp_link_training.c | 11 ++++++++--- drivers/gpu/drm/i915/intel_drv.h | 2 -- 3 files changed, 11 insertions(+), 17 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c index 3ca33bd..c5c0201 100644 --- a/drivers/gpu/drm/i915/intel_dp.c +++ b/drivers/gpu/drm/i915/intel_dp.c @@ -2863,17 +2863,6 @@ static void chv_dp_post_pll_disable(struct intel_encoder *encoder) chv_phy_post_pll_disable(encoder); } -/* - * Fetch AUX CH registers 0x202 - 0x207 which contain - * link status information - */ -bool -intel_dp_get_link_status(struct intel_dp *intel_dp, uint8_t link_status[DP_LINK_STATUS_SIZE]) -{ - return drm_dp_dpcd_read(&intel_dp->aux, DP_LANE0_1_STATUS, link_status, - DP_LINK_STATUS_SIZE) == DP_LINK_STATUS_SIZE; -} - /* These are source-specific values. */ uint8_t intel_dp_voltage_max(struct intel_dp *intel_dp) @@ -3869,10 +3858,12 @@ intel_dp_check_link_status(struct intel_dp *intel_dp) struct intel_encoder *intel_encoder = &dp_to_dig_port(intel_dp)->base; struct drm_device *dev = intel_dp_to_dev(intel_dp); u8 link_status[DP_LINK_STATUS_SIZE]; + int len; WARN_ON(!drm_modeset_is_locked(&dev->mode_config.connection_mutex)); - if (!intel_dp_get_link_status(intel_dp, link_status)) { + len = drm_dp_dpcd_read_link_status(&intel_dp->aux, link_status); + if (len != DP_LINK_STATUS_SIZE) { DRM_ERROR("Failed to get link status\n"); return; } diff --git a/drivers/gpu/drm/i915/intel_dp_link_training.c b/drivers/gpu/drm/i915/intel_dp_link_training.c index 60fb39c..c0a858d 100644 --- a/drivers/gpu/drm/i915/intel_dp_link_training.c +++ b/drivers/gpu/drm/i915/intel_dp_link_training.c @@ -107,7 +107,7 @@ intel_dp_update_link_train(struct intel_dp *intel_dp) static void intel_dp_link_training_clock_recovery(struct intel_dp *intel_dp) { - int i; + int i, len; uint8_t voltage; int voltage_tries, loop_tries; uint8_t link_config[2]; @@ -150,7 +150,9 @@ intel_dp_link_training_clock_recovery(struct intel_dp *intel_dp) uint8_t link_status[DP_LINK_STATUS_SIZE]; drm_dp_link_train_clock_recovery_delay(intel_dp->dpcd); - if (!intel_dp_get_link_status(intel_dp, link_status)) { + + len = drm_dp_dpcd_read_link_status(&intel_dp->aux, link_status); + if (len != DP_LINK_STATUS_SIZE) { DRM_ERROR("failed to get link status\n"); break; } @@ -235,6 +237,7 @@ intel_dp_link_training_channel_equalization(struct intel_dp *intel_dp) bool channel_eq = false; int tries, cr_tries; u32 training_pattern; + int len; training_pattern = intel_dp_training_pattern(intel_dp); @@ -258,7 +261,9 @@ intel_dp_link_training_channel_equalization(struct intel_dp *intel_dp) } drm_dp_link_train_channel_eq_delay(intel_dp->dpcd); - if (!intel_dp_get_link_status(intel_dp, link_status)) { + + len = drm_dp_dpcd_read_link_status(&intel_dp->aux, link_status); + if (len != DP_LINK_STATUS_SIZE) { DRM_ERROR("failed to get link status\n"); break; } diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h index e74d851..87069ba 100644 --- a/drivers/gpu/drm/i915/intel_drv.h +++ b/drivers/gpu/drm/i915/intel_drv.h @@ -1403,8 +1403,6 @@ intel_dp_pre_emphasis_max(struct intel_dp *intel_dp, uint8_t voltage_swing); void intel_dp_compute_rate(struct intel_dp *intel_dp, int port_clock, uint8_t *link_bw, uint8_t *rate_select); bool intel_dp_source_supports_hbr2(struct intel_dp *intel_dp); -bool -intel_dp_get_link_status(struct intel_dp *intel_dp, uint8_t link_status[DP_LINK_STATUS_SIZE]); static inline unsigned int intel_dp_unused_lane_mask(int lane_count) {