diff mbox

[I-G-T,v3,2/2] igt/gem_mocs_settings: adding RC6 tests

Message ID 1470317966-14201-3-git-send-email-peter.antoine@intel.com (mailing list archive)
State New, archived
Headers show

Commit Message

Peter Antoine Aug. 4, 2016, 1:39 p.m. UTC 
This change adds a RC6 test for the MOCS. The MOCS registers are loaded
and saved as part of the RC6 cycle but not all the registers are
saved/restored. This tests that those registers are correctly restored.

Signed-off-by: Peter Antoine <peter.antoine@intel.com>
---
 tests/gem_mocs_settings.c | 64 +++++++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 64 insertions(+)

Comments

Chris Wilson Aug. 4, 2016, 3:55 p.m. UTC | #1 
On Thu, Aug 04, 2016 at 02:39:26PM +0100, Peter Antoine wrote:
> This change adds a RC6 test for the MOCS. The MOCS registers are loaded
> and saved as part of the RC6 cycle but not all the registers are
> saved/restored. This tests that those registers are correctly restored.
> 
> Signed-off-by: Peter Antoine <peter.antoine@intel.com>

Tweaked to use igt_sysfs and pushed.
-Chris
diff mbox

Patch

diff --git a/tests/gem_mocs_settings.c b/tests/gem_mocs_settings.c
index 4fb3a02..5b91c7d 100644
--- a/tests/gem_mocs_settings.c
+++ b/tests/gem_mocs_settings.c
@@ -518,6 +518,67 @@  static void run_tests(unsigned mode)
 	intel_register_access_fini();
 }
 
+static unsigned int readit(const char *path)
+{
+	unsigned int ret = 0;
+	int scanned = 0;
+	FILE *file;
+
+	file = fopen(path, "r");
+	igt_assert(file);
+	scanned = fscanf(file, "%u", &ret);
+	igt_assert_eq(scanned, 1);
+
+	fclose(file);
+
+	return ret;
+}
+
+static int read_rc6_residency(void)
+{
+	unsigned int residency;
+	const int device = drm_get_card();
+	static const char path_format[] =
+				"/sys/class/drm/card%d/power/rc6_residency_ms";
+	char path[sizeof(path_format)];
+	int  ret;
+
+	ret = snprintf(path, sizeof(path)-1, path_format, device);
+
+	igt_assert_neq(ret, -1);
+	residency = readit(path);
+
+	return residency;
+}
+
+static void context_rc6_test(void)
+{
+	int fd = drm_open_driver(DRIVER_INTEL);
+	int res_ms;
+	int timeout;
+	uint32_t ctx_id = gem_context_create(fd);
+
+	igt_debug("RC6 Context Test\n");
+	check_control_registers(fd, I915_EXEC_RENDER, ctx_id, false);
+	check_l3cc_registers(fd, I915_EXEC_RENDER, ctx_id, false);
+
+	res_ms = read_rc6_residency();
+
+	timeout = 3000 / 2;
+	while (read_rc6_residency() == res_ms && --timeout)
+		usleep(2000);
+
+	if (res_ms == read_rc6_residency()) {
+		close(fd);
+		igt_skip(res_ms, read_rc6_residency());
+	}
+
+	check_control_registers(fd, I915_EXEC_RENDER, ctx_id, false);
+	check_l3cc_registers(fd, I915_EXEC_RENDER, ctx_id, false);
+	close(fd);
+}
+
+
 static void test_requirements(void)
 {
 	int fd = drm_open_driver_master(DRIVER_INTEL);
@@ -537,6 +598,9 @@  igt_main
 	igt_subtest("mocs-settings")
 		run_tests(NONE);
 
+	igt_subtest("mocs-rc6")
+		context_rc6_test();
+
 	igt_subtest("mocs-reset")
 		run_tests(RESET);