From patchwork Fri Aug 12 06:25:22 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: akash.goel@intel.com X-Patchwork-Id: 9276393 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 6DFF2600CB for ; Fri, 12 Aug 2016 06:12:16 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 5F1F92888A for ; Fri, 12 Aug 2016 06:12:16 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 542B12888C; Fri, 12 Aug 2016 06:12:16 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.2 required=2.0 tests=BAYES_00, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 013252888A for ; Fri, 12 Aug 2016 06:12:16 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 7844A6EA6F; Fri, 12 Aug 2016 06:12:15 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga09.intel.com (mga09.intel.com [134.134.136.24]) by gabe.freedesktop.org (Postfix) with ESMTP id 25C046EA72 for ; Fri, 12 Aug 2016 06:12:14 +0000 (UTC) Received: from fmsmga004.fm.intel.com ([10.253.24.48]) by orsmga102.jf.intel.com with ESMTP; 11 Aug 2016 23:12:15 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.28,508,1464678000"; d="scan'208";a="154643745" Received: from akashgoe-desktop.iind.intel.com ([10.223.82.36]) by fmsmga004.fm.intel.com with ESMTP; 11 Aug 2016 23:12:12 -0700 From: akash.goel@intel.com To: intel-gfx@lists.freedesktop.org Date: Fri, 12 Aug 2016 11:55:22 +0530 Message-Id: <1470983123-22127-20-git-send-email-akash.goel@intel.com> X-Mailer: git-send-email 1.9.2 In-Reply-To: <1470983123-22127-1-git-send-email-akash.goel@intel.com> References: <1470983123-22127-1-git-send-email-akash.goel@intel.com> Cc: Akash Goel Subject: [Intel-gfx] [PATCH 19/20] drm/i915: Use SSE4.1 movntdqa based memcpy for sampling GuC log buffer X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Virus-Scanned: ClamAV using ClamSMTP From: Akash Goel In order to have fast reads from the GuC log buffer, used SSE4.1 movntdqa based memcpy function i915_memcpy_from_wc. GuC log buffer has a WC type vmalloc mapping and copying using movntqda from WC type memory is almost as fast as reading from WB memory. This will further reduce the log buffer sampling time, so is needed dearly to deal with the flush interrupt storm when GuC is generating logs at a very high rate. Ideally SSE 4.1 should be present on all chipsets supporting GuC based submisssions, but if not then logging will not be enabled. Suggested-by: Chris Wilson Signed-off-by: Akash Goel Reviewed-by: Tvrtko Ursulin --- drivers/gpu/drm/i915/i915_guc_submission.c | 17 ++++++++++++++--- 1 file changed, 14 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_guc_submission.c b/drivers/gpu/drm/i915/i915_guc_submission.c index 1818343..af48f62 100644 --- a/drivers/gpu/drm/i915/i915_guc_submission.c +++ b/drivers/gpu/drm/i915/i915_guc_submission.c @@ -987,15 +987,16 @@ static void guc_read_update_log_buffer(struct intel_guc *guc) /* Just copy the newly written data */ if (read_offset <= write_offset) { bytes_to_copy = write_offset - read_offset; - memcpy(dst_data_ptr + read_offset, + i915_memcpy_from_wc(dst_data_ptr + read_offset, src_data_ptr + read_offset, bytes_to_copy); } else { bytes_to_copy = buffer_size - read_offset; - memcpy(dst_data_ptr + read_offset, + i915_memcpy_from_wc(dst_data_ptr + read_offset, src_data_ptr + read_offset, bytes_to_copy); bytes_to_copy = write_offset; - memcpy(dst_data_ptr, src_data_ptr, bytes_to_copy); + i915_memcpy_from_wc(dst_data_ptr, src_data_ptr, + bytes_to_copy); } src_data_ptr += buffer_size; @@ -1210,6 +1211,16 @@ static void guc_create_log(struct intel_guc *guc) obj = guc->log.obj; if (!obj) { + /* We require SSE 4.1 for fast reads from the GuC log buffer and + * it should be present on the chipsets supporting GuC based + * submisssions. + */ + if (WARN_ON(!i915_memcpy_from_wc(NULL, NULL, 0))) { + /* logging will not be enabled */ + i915.guc_log_level = -1; + return; + } + obj = gem_allocate_guc_obj(dev_priv, size); if (!obj) { /* logging will be off */