From patchwork Mon Aug 15 09:48:52 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chris Wilson X-Patchwork-Id: 9280711 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 3B3836086A for ; Mon, 15 Aug 2016 09:49:39 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 2C98828D25 for ; Mon, 15 Aug 2016 09:49:39 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 2159428D29; Mon, 15 Aug 2016 09:49:39 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.1 required=2.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_MED,T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id B81D828D35 for ; Mon, 15 Aug 2016 09:49:38 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id AD6266E3D5; Mon, 15 Aug 2016 09:49:36 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mail-wm0-x243.google.com (mail-wm0-x243.google.com [IPv6:2a00:1450:400c:c09::243]) by gabe.freedesktop.org (Postfix) with ESMTPS id D8B386E3D2 for ; Mon, 15 Aug 2016 09:49:31 +0000 (UTC) Received: by mail-wm0-x243.google.com with SMTP id q128so10216819wma.1 for ; Mon, 15 Aug 2016 02:49:31 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=sender:from:to:subject:date:message-id:in-reply-to:references; bh=SYm6GEUPRZIn1vANuVnIsCfaYcWTNCo9GWyjuMDTbjM=; b=FCD6QJuWIhXdkIZ9t8TBFrvXXTFM3jWEsjQzHQdtpaRkIcXowHEQTYIFP/H8mJUjgK HMP1ELpL3HueqB+XiOfMhljUP4/65AsOIxExDW6mnuyIiKhhab4+88N65F/T3G9Kb4G9 FX2YyOcXNx5lemhG4XY98wgiGmoRORmndY41y1fPeFM37LoKSsyU+xp+AWxNdMNTlzST 03GBleAMcKG1RDkLa3JxXNly6LYrsScL9Tx5XxU5cZIV1CgonVZoaCdV/LoEhFE8hUT4 dTimY4mo+pQK48lCkcqwq9J7hN+qmQXjsD0s5Rcn1PYBIshN9fLHaNCOySj8lriNKIj9 H4vg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:sender:from:to:subject:date:message-id :in-reply-to:references; bh=SYm6GEUPRZIn1vANuVnIsCfaYcWTNCo9GWyjuMDTbjM=; b=BTrNB2dfc4nStGiomNn/JLIssTwSJkhvul219J7nR7HHl43tLvKNViMd4Gjp0yvedF V8Tb44S5iM/4g90YEuHuj3E/uti+BZhw1g57OvHVycsCG0ITGIXOM4FuBU1Y+rp6LnE1 L6yWn+7DazCcWhXJKjCF8bvkOc3XLok5YjFIt4ol8Tt2idriUZQ9F9DmpOE27ktpnBPi f9jE0zGIQ79suEZMgW5OKCWFhE7xA2r8ESrpinF2mAKFpRqUA+FYwd+XOV1TiDKJamvw TcFek/MjnTgs1hEhATNiGQWgvi98dDGfwEBiH9RAbO65ou+PXaNA6ZTwh16QLi5OuVsD w2kw== X-Gm-Message-State: AEkoouuPkOsP2GAF/h//p1UA//QVJ+ujc6+49SJUp9XO5Ph6Mi4UnBVzDDIdzP3cxwwRYQ== X-Received: by 10.194.23.39 with SMTP id j7mr30489328wjf.4.1471254570225; Mon, 15 Aug 2016 02:49:30 -0700 (PDT) Received: from haswell.alporthouse.com ([78.156.65.138]) by smtp.gmail.com with ESMTPSA id v203sm15675247wmv.2.2016.08.15.02.49.29 for (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 15 Aug 2016 02:49:29 -0700 (PDT) From: Chris Wilson To: intel-gfx@lists.freedesktop.org Date: Mon, 15 Aug 2016 10:48:52 +0100 Message-Id: <1471254551-25805-13-git-send-email-chris@chris-wilson.co.uk> X-Mailer: git-send-email 2.8.1 In-Reply-To: <1471254551-25805-1-git-send-email-chris@chris-wilson.co.uk> References: <1471254551-25805-1-git-send-email-chris@chris-wilson.co.uk> Subject: [Intel-gfx] [CI 13/32] drm/i915: Convert fence computations to use vma directly X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Virus-Scanned: ClamAV using ClamSMTP Lookup the GGTT vma once for the object assigned to the fence, and then derive everything from that vma. Signed-off-by: Chris Wilson Reviewed-by: Joonas Lahtinen --- drivers/gpu/drm/i915/i915_gem_fence.c | 55 +++++++++++++++++------------------ 1 file changed, 26 insertions(+), 29 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_gem_fence.c b/drivers/gpu/drm/i915/i915_gem_fence.c index 9e8173fe2a09..d99fc5734cf1 100644 --- a/drivers/gpu/drm/i915/i915_gem_fence.c +++ b/drivers/gpu/drm/i915/i915_gem_fence.c @@ -85,22 +85,19 @@ static void i965_write_fence_reg(struct drm_device *dev, int reg, POSTING_READ(fence_reg_lo); if (obj) { - u32 size = i915_gem_obj_ggtt_size(obj); + struct i915_vma *vma = i915_gem_obj_to_ggtt(obj); unsigned int tiling = i915_gem_object_get_tiling(obj); unsigned int stride = i915_gem_object_get_stride(obj); - uint64_t val; + u32 size = vma->node.size; + u32 row_size = stride * (tiling == I915_TILING_Y ? 32 : 8); + u64 val; /* Adjust fence size to match tiled area */ - if (tiling != I915_TILING_NONE) { - uint32_t row_size = stride * - (tiling == I915_TILING_Y ? 32 : 8); - size = (size / row_size) * row_size; - } + size = rounddown(size, row_size); - val = (uint64_t)((i915_gem_obj_ggtt_offset(obj) + size - 4096) & - 0xfffff000) << 32; - val |= i915_gem_obj_ggtt_offset(obj) & 0xfffff000; - val |= (uint64_t)((stride / 128) - 1) << fence_pitch_shift; + val = ((vma->node.start + size - 4096) & 0xfffff000) << 32; + val |= vma->node.start & 0xfffff000; + val |= (u64)((stride / 128) - 1) << fence_pitch_shift; if (tiling == I915_TILING_Y) val |= 1 << I965_FENCE_TILING_Y_SHIFT; val |= I965_FENCE_REG_VALID; @@ -123,17 +120,17 @@ static void i915_write_fence_reg(struct drm_device *dev, int reg, u32 val; if (obj) { - u32 size = i915_gem_obj_ggtt_size(obj); + struct i915_vma *vma = i915_gem_obj_to_ggtt(obj); unsigned int tiling = i915_gem_object_get_tiling(obj); unsigned int stride = i915_gem_object_get_stride(obj); int pitch_val; int tile_width; - WARN((i915_gem_obj_ggtt_offset(obj) & ~I915_FENCE_START_MASK) || - (size & -size) != size || - (i915_gem_obj_ggtt_offset(obj) & (size - 1)), - "object 0x%08llx [fenceable? %d] not 1M or pot-size (0x%08x) aligned\n", - i915_gem_obj_ggtt_offset(obj), obj->map_and_fenceable, size); + WARN((vma->node.start & ~I915_FENCE_START_MASK) || + !is_power_of_2(vma->node.size) || + (vma->node.start & (vma->node.size - 1)), + "object 0x%08llx [fenceable? %d] not 1M or pot-size (0x%08llx) aligned\n", + vma->node.start, obj->map_and_fenceable, vma->node.size); if (tiling == I915_TILING_Y && HAS_128_BYTE_Y_TILING(dev)) tile_width = 128; @@ -144,10 +141,10 @@ static void i915_write_fence_reg(struct drm_device *dev, int reg, pitch_val = stride / tile_width; pitch_val = ffs(pitch_val) - 1; - val = i915_gem_obj_ggtt_offset(obj); + val = vma->node.start; if (tiling == I915_TILING_Y) val |= 1 << I830_FENCE_TILING_Y_SHIFT; - val |= I915_FENCE_SIZE_BITS(size); + val |= I915_FENCE_SIZE_BITS(vma->node.size); val |= pitch_val << I830_FENCE_PITCH_SHIFT; val |= I830_FENCE_REG_VALID; } else @@ -161,27 +158,27 @@ static void i830_write_fence_reg(struct drm_device *dev, int reg, struct drm_i915_gem_object *obj) { struct drm_i915_private *dev_priv = to_i915(dev); - uint32_t val; + u32 val; if (obj) { - u32 size = i915_gem_obj_ggtt_size(obj); + struct i915_vma *vma = i915_gem_obj_to_ggtt(obj); unsigned int tiling = i915_gem_object_get_tiling(obj); unsigned int stride = i915_gem_object_get_stride(obj); - uint32_t pitch_val; + u32 pitch_val; - WARN((i915_gem_obj_ggtt_offset(obj) & ~I830_FENCE_START_MASK) || - (size & -size) != size || - (i915_gem_obj_ggtt_offset(obj) & (size - 1)), - "object 0x%08llx not 512K or pot-size 0x%08x aligned\n", - i915_gem_obj_ggtt_offset(obj), size); + WARN((vma->node.start & ~I830_FENCE_START_MASK) || + !is_power_of_2(vma->node.size) || + (vma->node.start & (vma->node.size - 1)), + "object 0x%08llx not 512K or pot-size 0x%08llx aligned\n", + vma->node.start, vma->node.size); pitch_val = stride / 128; pitch_val = ffs(pitch_val) - 1; - val = i915_gem_obj_ggtt_offset(obj); + val = vma->node.start; if (tiling == I915_TILING_Y) val |= 1 << I830_FENCE_TILING_Y_SHIFT; - val |= I830_FENCE_SIZE_BITS(size); + val |= I830_FENCE_SIZE_BITS(vma->node.size); val |= pitch_val << I830_FENCE_PITCH_SHIFT; val |= I830_FENCE_REG_VALID; } else