From patchwork Tue Aug 16 10:42:45 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chris Wilson X-Patchwork-Id: 9283275 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 4A5236086A for ; Tue, 16 Aug 2016 10:43:28 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 3AFC0285CC for ; Tue, 16 Aug 2016 10:43:28 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 2FDF4285CF; Tue, 16 Aug 2016 10:43:28 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.1 required=2.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_MED,T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id B44EA285CE for ; Tue, 16 Aug 2016 10:43:27 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 0669C6E66D; Tue, 16 Aug 2016 10:43:27 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mail-wm0-x241.google.com (mail-wm0-x241.google.com [IPv6:2a00:1450:400c:c09::241]) by gabe.freedesktop.org (Postfix) with ESMTPS id 11AA66E66C for ; Tue, 16 Aug 2016 10:43:24 +0000 (UTC) Received: by mail-wm0-x241.google.com with SMTP id i138so15624314wmf.3 for ; Tue, 16 Aug 2016 03:43:23 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references; bh=sMUaR816qnwbUSm9ya1yzgmcYUUemVzPBvXCcy7TZFU=; b=avLLU68h7sjobUSyWtVaO6GKtQukhFdjRU3ufBndjjXG0bqFbfZIyRctjlg/k2LQ54 fyVa2AUTW6mcNLcfoDPDhTPlT81tL5kHfovh9XM1AaXM/OazZ88qSDLuhZtgyEAQGXIc yZ7fZYAFKi8Ooc8L/RNwaeJaHgMF6noAQcC49CVNyAdwlCUczew/z/6Fds2oFwwRQVDR 4GawdAxTC+8/kpsEN1sLmlgCDrxZR9bYnr/Yn79GWxM5gFaqe4/NqM/p15u0W8wBvmmG jpO9WIt2o+8UlE5TtF2BxyQtK5CtJLT3+kb/dkwHwI2YmkIuomMjNGizCh/zGczJcSRl awRQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references; bh=sMUaR816qnwbUSm9ya1yzgmcYUUemVzPBvXCcy7TZFU=; b=PXOCVZO5smXzlgr/SCaAkC+AwYNMwYXc8h1/tN3v1diE5UWbshJ9QoPuHAg7NuAPZV wluYIxAHaF06/rIBc4BPMy6HYuuwI78FSXkGVk2kSg6iH8ue4ax84eJfnnrm4v6wOeAU BXzXwr7KebwsFrk81Dilvm/PR93UHod67NvZuj9yWZlzK1xHKAqv+z7IdFdN9/Jvp2o8 4QfEsC4ImD7k69jGjXbb/aQp/TuOX/XSX9ExLLNTX8sRD4Qtlsf7ENQXBm4GFS7kbXdw 7JhBoz68YL/Dadyy4+OKPAJ/u4v2zCywMm5nWQT9PS67vmgDrbnEHUUd1rDb+xGr46vp HGvw== X-Gm-Message-State: AEkoousWBWWAHXg43LoPGrKFq6R6rdoi74TklhNd+XjD3VXEg+2nhQ7rCZBu9N2CDPYPBw== X-Received: by 10.194.58.196 with SMTP id t4mr36735767wjq.110.1471344202691; Tue, 16 Aug 2016 03:43:22 -0700 (PDT) Received: from haswell.alporthouse.com ([78.156.65.138]) by smtp.gmail.com with ESMTPSA id d62sm21175546wmd.7.2016.08.16.03.43.21 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 16 Aug 2016 03:43:22 -0700 (PDT) From: Chris Wilson To: intel-gfx@lists.freedesktop.org Date: Tue, 16 Aug 2016 11:42:45 +0100 Message-Id: <1471344168-28136-20-git-send-email-chris@chris-wilson.co.uk> X-Mailer: git-send-email 2.8.1 In-Reply-To: <1471344168-28136-1-git-send-email-chris@chris-wilson.co.uk> References: <1471344168-28136-1-git-send-email-chris@chris-wilson.co.uk> Cc: Daniel Vetter Subject: [Intel-gfx] [PATCH 19/22] drm/i915: Fallback to using unmappable memory for scanout X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Virus-Scanned: ClamAV using ClamSMTP The existing ABI says that scanouts are pinned into the mappable region so that legacy clients (e.g. old Xorg or plymouthd) can write directly into the scanout through a GTT mapping. However if the surface does not fit into the mappable region, we are better off just trying to fit it anywhere and hoping for the best. (Any userspace that is capable of using ginormous scanouts is also likely not to rely on pure GTT updates.) With the partial vma fault support, we are no longer restricted to only using scanouts that we can pin (though it is still preferred for performance reasons and for powersaving features like FBC). v2: Skip fence pinning when not mappable. v3: Add a comment to explain the possible ramifications of not being able to use fences for unmappable scanouts. v4: Rebase to skip over some local patches v5: Rebase to defer until after we have unmappable GTT fault support Signed-off-by: Chris Wilson Cc: Deepak S Cc: Damien Lespiau Cc: Daniel Vetter Cc: Jani Nikula Reviewed-by: Joonas Lahtinen --- drivers/gpu/drm/i915/i915_gem.c | 14 ++++++++++---- drivers/gpu/drm/i915/intel_fbc.c | 4 ++++ 2 files changed, 14 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c index e28d283256f0..9455e110fb1b 100644 --- a/drivers/gpu/drm/i915/i915_gem.c +++ b/drivers/gpu/drm/i915/i915_gem.c @@ -3570,11 +3570,17 @@ i915_gem_object_pin_to_display_plane(struct drm_i915_gem_object *obj, /* As the user may map the buffer once pinned in the display plane * (e.g. libkms for the bootup splash), we have to ensure that we - * always use map_and_fenceable for all scanout buffers. + * always use map_and_fenceable for all scanout buffers. However, + * it may simply be too big to fit into mappable, in which case + * put it anyway and hope that userspace can cope (but always first + * try to preserve the existing ABI). */ - vma = i915_gem_object_ggtt_pin(obj, view, 0, alignment, - view->type == I915_GGTT_VIEW_NORMAL ? - PIN_MAPPABLE : 0); + vma = ERR_PTR(-ENOSPC); + if (view->type == I915_GGTT_VIEW_NORMAL) + vma = i915_gem_object_ggtt_pin(obj, view, 0, alignment, + PIN_MAPPABLE | PIN_NONBLOCK); + if (IS_ERR(vma)) + vma = i915_gem_object_ggtt_pin(obj, view, 0, alignment, 0); if (IS_ERR(vma)) goto err_unpin_display; diff --git a/drivers/gpu/drm/i915/intel_fbc.c b/drivers/gpu/drm/i915/intel_fbc.c index 40bf2e4c804d..37415f96f906 100644 --- a/drivers/gpu/drm/i915/intel_fbc.c +++ b/drivers/gpu/drm/i915/intel_fbc.c @@ -776,6 +776,10 @@ static bool intel_fbc_can_activate(struct intel_crtc *crtc) /* The use of a CPU fence is mandatory in order to detect writes * by the CPU to the scanout and trigger updates to the FBC. + * + * Note that is possible for a tiled surface to be unmappable (and + * so have no fence associated with it) due to aperture constaints + * at the time of pinning. */ if (cache->fb.tiling_mode != I915_TILING_X || cache->fb.fence_reg == I915_FENCE_REG_NONE) {