Message ID | 1471669765-5935-6-git-send-email-sagar.a.kamble@intel.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
On Sat, Aug 20, 2016 at 10:39:04AM +0530, Sagar Arun Kamble wrote: > From: Tom O'Rourke <Tom.O'Rourke@intel.com> > > i915.enable_slpc is used to override the default for slpc usage. > The expected values are -1=auto, 0=disabled [default], 1=enabled. > > slpc_enable_sanitize() converts i915.enable_slpc to either 0 or 1. > Interpretation of default value is based on HAS_SLPC(), after > slpc_version_check(). This function also enforces the requirement > that guc_submission is required for slpc. > > intel_slpc_enabled() returns 1 if SLPC should be used. > > v2: Add early call to sanitize enable_slpc in intel_guc_ucode_init > > v5: Remove sanitize enable_slpc call before firmware version check > is performed. (ChrisW) > Version check is added in next patch and that will be done as > part of slpc_enable_sanitize function in the next patch. (Sagar) > Updated slpc option sanitize function call for platforms without > GuC support. This was caught by CI BAT. > > Suggested-by: Paulo Zanoni <paulo.r.zanoni@intel.com> > Signed-off-by: Tom O'Rourke <Tom.O'Rourke@intel.com> > Signed-off-by: Sagar Arun Kamble <sagar.a.kamble@intel.com> > --- > drivers/gpu/drm/i915/i915_params.c | 6 ++++++ > drivers/gpu/drm/i915/i915_params.h | 1 + > drivers/gpu/drm/i915/intel_guc.h | 6 ++++++ > drivers/gpu/drm/i915/intel_guc_loader.c | 30 ++++++++++++++++++++++++++---- > 4 files changed, 39 insertions(+), 4 deletions(-) > > diff --git a/drivers/gpu/drm/i915/i915_params.c b/drivers/gpu/drm/i915/i915_params.c > index 768ad89..72b3097 100644 > --- a/drivers/gpu/drm/i915/i915_params.c > +++ b/drivers/gpu/drm/i915/i915_params.c > @@ -36,6 +36,7 @@ struct i915_params i915 __read_mostly = { > .enable_dc = -1, > .enable_fbc = -1, > .enable_execlists = -1, > + .enable_slpc = 0, > .enable_hangcheck = true, > .enable_ppgtt = -1, > .enable_psr = -1, > @@ -131,6 +132,11 @@ MODULE_PARM_DESC(enable_execlists, > "Override execlists usage. " > "(-1=auto [default], 0=disabled, 1=enabled)"); > > +module_param_named_unsafe(enable_slpc, i915.enable_slpc, int, 0400); > +MODULE_PARM_DESC(enable_slpc, > + "Override single-loop-power-controller (slpc) usage. " > + "(-1=auto, 0=disabled [default], 1=enabled)"); > + > module_param_named_unsafe(enable_psr, i915.enable_psr, int, 0600); > MODULE_PARM_DESC(enable_psr, "Enable PSR " > "(0=disabled, 1=enabled - link mode chosen per-platform, 2=force link-standby mode, 3=force link-off mode) " > diff --git a/drivers/gpu/drm/i915/i915_params.h b/drivers/gpu/drm/i915/i915_params.h > index 3a0dd78..391c471 100644 > --- a/drivers/gpu/drm/i915/i915_params.h > +++ b/drivers/gpu/drm/i915/i915_params.h > @@ -39,6 +39,7 @@ struct i915_params { > int enable_fbc; > int enable_ppgtt; > int enable_execlists; > + int enable_slpc; > int enable_psr; > unsigned int preliminary_hw_support; > int disable_power_well; > diff --git a/drivers/gpu/drm/i915/intel_guc.h b/drivers/gpu/drm/i915/intel_guc.h > index 9e6b948..27a7459 100644 > --- a/drivers/gpu/drm/i915/intel_guc.h > +++ b/drivers/gpu/drm/i915/intel_guc.h > @@ -146,6 +146,12 @@ struct intel_guc { > uint32_t last_seqno[I915_NUM_ENGINES]; > }; > > +static inline int intel_slpc_enabled(void) > +{ > + WARN_ON(i915.enable_slpc < 0); > + return i915.enable_slpc; > +} > + > /* intel_guc_loader.c */ > extern void intel_guc_init(struct drm_device *dev); > extern int intel_guc_setup(struct drm_device *dev); > diff --git a/drivers/gpu/drm/i915/intel_guc_loader.c b/drivers/gpu/drm/i915/intel_guc_loader.c > index 324812d..75b360f 100644 > --- a/drivers/gpu/drm/i915/intel_guc_loader.c > +++ b/drivers/gpu/drm/i915/intel_guc_loader.c > @@ -144,6 +144,25 @@ static void direct_interrupts_to_guc(struct drm_i915_private *dev_priv) > } > } > > +static void sanitize_slpc_option(struct drm_device *dev) > +{ > + /* Handle default case */ > + if (i915.enable_slpc < 0) > + i915.enable_slpc = HAS_SLPC(dev); > + > + /* slpc requires hardware support and compatible firmware */ > + if (!HAS_SLPC(dev)) > + i915.enable_slpc = 0; I'd prefer if you pass dev_priv to HAS_SLPC (and thus pass in drm_i915_private * to the function instead). > + > + /* slpc requires guc loaded */ > + if (!i915.enable_guc_loading) > + i915.enable_slpc = 0; > + > + /* slpc requires guc submission */ > + if (!i915.enable_guc_submission) > + i915.enable_slpc = 0; > +} > + > static u32 get_gttype(struct drm_i915_private *dev_priv) > { > /* XXX: GT type based on PCI device ID? field seems unused by fw */ > @@ -728,18 +747,21 @@ void intel_guc_init(struct drm_device *dev) > guc_fw->guc_fw_fetch_status = GUC_FIRMWARE_NONE; > guc_fw->guc_fw_load_status = GUC_FIRMWARE_NONE; > > - /* Early (and silent) return if GuC loading is disabled */ > + /* Return if GuC loading is disabled sanitizing SLPC option */ > if (!i915.enable_guc_loading) > - return; > + goto out; > if (fw_path == NULL) > - return; > + goto out; > if (*fw_path == '\0') > - return; > + goto out; > > guc_fw->guc_fw_fetch_status = GUC_FIRMWARE_PENDING; > DRM_DEBUG_DRIVER("GuC firmware pending, path %s\n", fw_path); > guc_fw_fetch(dev, guc_fw); > /* status must now be FAIL or SUCCESS */ > + > +out: > + sanitize_slpc_option(dev); > } > > /** Reviewed-by: David Weinehall <david.weinehall@linux.intel.com>
Hi Tom, [auto build test ERROR on drm-intel/for-linux-next] [also build test ERROR on v4.8-rc3 next-20160819] [if your patch is applied to the wrong git tree, please drop us a note to help improve the system] [Suggest to use git(>=2.9.0) format-patch --base=<commit> (or --base=auto for convenience) to record what (public, well-known) commit your patch series was built on] [Check https://git-scm.com/docs/git-format-patch for more information] url: https://github.com/0day-ci/linux/commits/Sagar-Arun-Kamble/drm-i915-slpc-Add-enable_slpc-module-parameter/20160820-131710 base: git://anongit.freedesktop.org/drm-intel for-linux-next config: x86_64-randconfig-x015-201633 (attached as .config) compiler: gcc-6 (Debian 6.1.1-9) 6.1.1 20160705 reproduce: # save the attached .config to linux build tree make ARCH=x86_64 All errors (new ones prefixed by >>): drivers/gpu/drm/i915/intel_guc_loader.c: In function 'sanitize_slpc_option': >> drivers/gpu/drm/i915/intel_guc_loader.c:139:22: error: implicit declaration of function 'HAS_SLPC' [-Werror=implicit-function-declaration] i915.enable_slpc = HAS_SLPC(dev); ^~~~~~~~ cc1: some warnings being treated as errors vim +/HAS_SLPC +139 drivers/gpu/drm/i915/intel_guc_loader.c 133 } 134 135 static void sanitize_slpc_option(struct drm_device *dev) 136 { 137 /* Handle default case */ 138 if (i915.enable_slpc < 0) > 139 i915.enable_slpc = HAS_SLPC(dev); 140 141 /* slpc requires hardware support and compatible firmware */ 142 if (!HAS_SLPC(dev)) --- 0-DAY kernel test infrastructure Open Source Technology Center https://lists.01.org/pipermail/kbuild-all Intel Corporation
diff --git a/drivers/gpu/drm/i915/i915_params.c b/drivers/gpu/drm/i915/i915_params.c index 768ad89..72b3097 100644 --- a/drivers/gpu/drm/i915/i915_params.c +++ b/drivers/gpu/drm/i915/i915_params.c @@ -36,6 +36,7 @@ struct i915_params i915 __read_mostly = { .enable_dc = -1, .enable_fbc = -1, .enable_execlists = -1, + .enable_slpc = 0, .enable_hangcheck = true, .enable_ppgtt = -1, .enable_psr = -1, @@ -131,6 +132,11 @@ MODULE_PARM_DESC(enable_execlists, "Override execlists usage. " "(-1=auto [default], 0=disabled, 1=enabled)"); +module_param_named_unsafe(enable_slpc, i915.enable_slpc, int, 0400); +MODULE_PARM_DESC(enable_slpc, + "Override single-loop-power-controller (slpc) usage. " + "(-1=auto, 0=disabled [default], 1=enabled)"); + module_param_named_unsafe(enable_psr, i915.enable_psr, int, 0600); MODULE_PARM_DESC(enable_psr, "Enable PSR " "(0=disabled, 1=enabled - link mode chosen per-platform, 2=force link-standby mode, 3=force link-off mode) " diff --git a/drivers/gpu/drm/i915/i915_params.h b/drivers/gpu/drm/i915/i915_params.h index 3a0dd78..391c471 100644 --- a/drivers/gpu/drm/i915/i915_params.h +++ b/drivers/gpu/drm/i915/i915_params.h @@ -39,6 +39,7 @@ struct i915_params { int enable_fbc; int enable_ppgtt; int enable_execlists; + int enable_slpc; int enable_psr; unsigned int preliminary_hw_support; int disable_power_well; diff --git a/drivers/gpu/drm/i915/intel_guc.h b/drivers/gpu/drm/i915/intel_guc.h index 9e6b948..27a7459 100644 --- a/drivers/gpu/drm/i915/intel_guc.h +++ b/drivers/gpu/drm/i915/intel_guc.h @@ -146,6 +146,12 @@ struct intel_guc { uint32_t last_seqno[I915_NUM_ENGINES]; }; +static inline int intel_slpc_enabled(void) +{ + WARN_ON(i915.enable_slpc < 0); + return i915.enable_slpc; +} + /* intel_guc_loader.c */ extern void intel_guc_init(struct drm_device *dev); extern int intel_guc_setup(struct drm_device *dev); diff --git a/drivers/gpu/drm/i915/intel_guc_loader.c b/drivers/gpu/drm/i915/intel_guc_loader.c index 324812d..75b360f 100644 --- a/drivers/gpu/drm/i915/intel_guc_loader.c +++ b/drivers/gpu/drm/i915/intel_guc_loader.c @@ -144,6 +144,25 @@ static void direct_interrupts_to_guc(struct drm_i915_private *dev_priv) } } +static void sanitize_slpc_option(struct drm_device *dev) +{ + /* Handle default case */ + if (i915.enable_slpc < 0) + i915.enable_slpc = HAS_SLPC(dev); + + /* slpc requires hardware support and compatible firmware */ + if (!HAS_SLPC(dev)) + i915.enable_slpc = 0; + + /* slpc requires guc loaded */ + if (!i915.enable_guc_loading) + i915.enable_slpc = 0; + + /* slpc requires guc submission */ + if (!i915.enable_guc_submission) + i915.enable_slpc = 0; +} + static u32 get_gttype(struct drm_i915_private *dev_priv) { /* XXX: GT type based on PCI device ID? field seems unused by fw */ @@ -728,18 +747,21 @@ void intel_guc_init(struct drm_device *dev) guc_fw->guc_fw_fetch_status = GUC_FIRMWARE_NONE; guc_fw->guc_fw_load_status = GUC_FIRMWARE_NONE; - /* Early (and silent) return if GuC loading is disabled */ + /* Return if GuC loading is disabled sanitizing SLPC option */ if (!i915.enable_guc_loading) - return; + goto out; if (fw_path == NULL) - return; + goto out; if (*fw_path == '\0') - return; + goto out; guc_fw->guc_fw_fetch_status = GUC_FIRMWARE_PENDING; DRM_DEBUG_DRIVER("GuC firmware pending, path %s\n", fw_path); guc_fw_fetch(dev, guc_fw); /* status must now be FAIL or SUCCESS */ + +out: + sanitize_slpc_option(dev); } /**