From patchwork Sun Aug 21 06:19:58 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: sagar.a.kamble@intel.com X-Patchwork-Id: 9291989 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id A4A06600CB for ; Sun, 21 Aug 2016 06:18:06 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 97C2E28B9B for ; Sun, 21 Aug 2016 06:18:06 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 8C8CB28BBC; Sun, 21 Aug 2016 06:18:06 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.2 required=2.0 tests=BAYES_00, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 2EA7F28B9B for ; Sun, 21 Aug 2016 06:18:06 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id BC2756E187; Sun, 21 Aug 2016 06:18:05 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga04.intel.com (mga04.intel.com [192.55.52.120]) by gabe.freedesktop.org (Postfix) with ESMTPS id 5198F6E187 for ; Sun, 21 Aug 2016 06:18:04 +0000 (UTC) Received: from fmsmga006.fm.intel.com ([10.253.24.20]) by fmsmga104.fm.intel.com with ESMTP; 20 Aug 2016 23:18:04 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.28,553,1464678000"; d="scan'208";a="187500" Received: from sakamble-desktop.iind.intel.com ([10.223.82.59]) by fmsmga006.fm.intel.com with ESMTP; 20 Aug 2016 23:18:03 -0700 From: Sagar Arun Kamble To: intel-gfx@lists.freedesktop.org Date: Sun, 21 Aug 2016 11:49:58 +0530 Message-Id: <1471760418-27509-6-git-send-email-sagar.a.kamble@intel.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1471760418-27509-1-git-send-email-sagar.a.kamble@intel.com> References: <1471669765-5935-1-git-send-email-sagar.a.kamble@intel.com> <1471760418-27509-1-git-send-email-sagar.a.kamble@intel.com> Cc: Tom O'Rourke Subject: [Intel-gfx] drm/i915/slpc: Add enable_slpc module parameter X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Virus-Scanned: ClamAV using ClamSMTP From: Tom O'Rourke i915.enable_slpc is used to override the default for slpc usage. The expected values are -1=auto, 0=disabled [default], 1=enabled. slpc_enable_sanitize() converts i915.enable_slpc to either 0 or 1. Interpretation of default value is based on HAS_SLPC(), after slpc_version_check(). This function also enforces the requirement that guc_submission is required for slpc. intel_slpc_enabled() returns 1 if SLPC should be used. v1: Add early call to sanitize enable_slpc in intel_guc_ucode_init Remove sanitize enable_slpc call before firmware version check is performed. (ChrisW) Version check is added in next patch and that will be done as part of slpc_enable_sanitize function in the next patch. (Sagar) Updated slpc option sanitize function call for platforms without GuC support. This was caught by CI BAT. v2: Changed parameter to dev_priv for HAS_SLPC macro. (David) Code indentation based on checkpatch. Suggested-by: Paulo Zanoni Reviewed-by: David Weinehall Signed-off-by: Tom O'Rourke Signed-off-by: Sagar Arun Kamble --- drivers/gpu/drm/i915/i915_params.c | 6 ++++++ drivers/gpu/drm/i915/i915_params.h | 1 + drivers/gpu/drm/i915/intel_guc.h | 6 ++++++ drivers/gpu/drm/i915/intel_guc_loader.c | 30 ++++++++++++++++++++++++++---- 4 files changed, 39 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_params.c b/drivers/gpu/drm/i915/i915_params.c index 768ad89..72b3097 100644 --- a/drivers/gpu/drm/i915/i915_params.c +++ b/drivers/gpu/drm/i915/i915_params.c @@ -36,6 +36,7 @@ struct i915_params i915 __read_mostly = { .enable_dc = -1, .enable_fbc = -1, .enable_execlists = -1, + .enable_slpc = 0, .enable_hangcheck = true, .enable_ppgtt = -1, .enable_psr = -1, @@ -131,6 +132,11 @@ MODULE_PARM_DESC(enable_execlists, "Override execlists usage. " "(-1=auto [default], 0=disabled, 1=enabled)"); +module_param_named_unsafe(enable_slpc, i915.enable_slpc, int, 0400); +MODULE_PARM_DESC(enable_slpc, + "Override single-loop-power-controller (slpc) usage. " + "(-1=auto, 0=disabled [default], 1=enabled)"); + module_param_named_unsafe(enable_psr, i915.enable_psr, int, 0600); MODULE_PARM_DESC(enable_psr, "Enable PSR " "(0=disabled, 1=enabled - link mode chosen per-platform, 2=force link-standby mode, 3=force link-off mode) " diff --git a/drivers/gpu/drm/i915/i915_params.h b/drivers/gpu/drm/i915/i915_params.h index 3a0dd78..391c471 100644 --- a/drivers/gpu/drm/i915/i915_params.h +++ b/drivers/gpu/drm/i915/i915_params.h @@ -39,6 +39,7 @@ struct i915_params { int enable_fbc; int enable_ppgtt; int enable_execlists; + int enable_slpc; int enable_psr; unsigned int preliminary_hw_support; int disable_power_well; diff --git a/drivers/gpu/drm/i915/intel_guc.h b/drivers/gpu/drm/i915/intel_guc.h index 9e6b948..bf7624f 100644 --- a/drivers/gpu/drm/i915/intel_guc.h +++ b/drivers/gpu/drm/i915/intel_guc.h @@ -146,6 +146,12 @@ struct intel_guc { uint32_t last_seqno[I915_NUM_ENGINES]; }; +static inline int intel_slpc_enabled(void) +{ + WARN_ON(i915.enable_slpc < 0); + return i915.enable_slpc; +} + /* intel_guc_loader.c */ extern void intel_guc_init(struct drm_device *dev); extern int intel_guc_setup(struct drm_device *dev); diff --git a/drivers/gpu/drm/i915/intel_guc_loader.c b/drivers/gpu/drm/i915/intel_guc_loader.c index 324812d..2dfdb24 100644 --- a/drivers/gpu/drm/i915/intel_guc_loader.c +++ b/drivers/gpu/drm/i915/intel_guc_loader.c @@ -144,6 +144,25 @@ static void direct_interrupts_to_guc(struct drm_i915_private *dev_priv) } } +static void sanitize_slpc_option(struct drm_i915_private *dev_priv) +{ + /* Handle default case */ + if (i915.enable_slpc < 0) + i915.enable_slpc = HAS_SLPC(dev_priv); + + /* slpc requires hardware support and compatible firmware */ + if (!HAS_SLPC(dev_priv)) + i915.enable_slpc = 0; + + /* slpc requires guc loaded */ + if (!i915.enable_guc_loading) + i915.enable_slpc = 0; + + /* slpc requires guc submission */ + if (!i915.enable_guc_submission) + i915.enable_slpc = 0; +} + static u32 get_gttype(struct drm_i915_private *dev_priv) { /* XXX: GT type based on PCI device ID? field seems unused by fw */ @@ -728,18 +747,21 @@ void intel_guc_init(struct drm_device *dev) guc_fw->guc_fw_fetch_status = GUC_FIRMWARE_NONE; guc_fw->guc_fw_load_status = GUC_FIRMWARE_NONE; - /* Early (and silent) return if GuC loading is disabled */ + /* Return if GuC loading is disabled sanitizing SLPC option */ if (!i915.enable_guc_loading) - return; + goto out; if (fw_path == NULL) - return; + goto out; if (*fw_path == '\0') - return; + goto out; guc_fw->guc_fw_fetch_status = GUC_FIRMWARE_PENDING; DRM_DEBUG_DRIVER("GuC firmware pending, path %s\n", fw_path); guc_fw_fetch(dev, guc_fw); /* status must now be FAIL or SUCCESS */ + +out: + sanitize_slpc_option(dev_priv); } /**