| Message ID | 1473236583-11533-23-git-send-email-sagar.a.kamble@intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h index 99b19ae..64950bc 100644 --- a/drivers/gpu/drm/i915/intel_drv.h +++ b/drivers/gpu/drm/i915/intel_drv.h @@ -1714,8 +1714,12 @@ bool chv_phy_powergate_ch(struct drm_i915_private *dev_priv, enum dpio_phy phy, static inline int intel_slpc_active(struct drm_i915_private *dev_priv) { + struct intel_guc_fw *guc_fw = &dev_priv->guc.guc_fw; int ret = 0; + if (guc_fw->guc_fw_load_status != GUC_FIRMWARE_SUCCESS) + return ret; + if (dev_priv->guc.slpc.vma && dev_priv->guc.slpc.enabled) ret = 1;
SLPC status has to be linked with GuC load status to make sure SLPC actions get invoked when GuC is loaded. v2: Space and function return convention issues. (Deepak) v3: Rebase. v4: Limiting the check for SLPC actions. Signed-off-by: Sagar Arun Kamble <sagar.a.kamble@intel.com> --- drivers/gpu/drm/i915/intel_drv.h | 4 ++++ 1 file changed, 4 insertions(+)