From patchwork Thu Sep 29 15:35:54 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tvrtko Ursulin X-Patchwork-Id: 9356595 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 2A4C9600C8 for ; Thu, 29 Sep 2016 15:36:33 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 1CBE829B74 for ; Thu, 29 Sep 2016 15:36:33 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 118DE29B81; Thu, 29 Sep 2016 15:36:33 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.1 required=2.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_MED,T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 92E9D29B74 for ; Thu, 29 Sep 2016 15:36:29 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 0BEC06E881; Thu, 29 Sep 2016 15:36:29 +0000 (UTC) X-Original-To: Intel-gfx@lists.freedesktop.org Delivered-To: Intel-gfx@lists.freedesktop.org Received: from mail-wm0-x244.google.com (mail-wm0-x244.google.com [IPv6:2a00:1450:400c:c09::244]) by gabe.freedesktop.org (Postfix) with ESMTPS id B59AF6E87B for ; Thu, 29 Sep 2016 15:36:17 +0000 (UTC) Received: by mail-wm0-x244.google.com with SMTP id b184so11308500wma.3 for ; Thu, 29 Sep 2016 08:36:17 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ursulin-net.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=BvzSCUf7kB4XkoILmKxoGrpYyGgCmThgZ4QUA+LFwJo=; b=uP2o+gCHGiq22wWaPvTL6G3sV1YJi1+bxYH+wT903AD9mxhxEV6jyeaSWN26igHpOv P/zBa4McxC7HS90hyot/mPlQeiL5bo0bB9WBH7i+o7+ZECDIJxpyy41owaZiJoS8T8M9 tLrCgtZbVxjeFXBoglUXey77h8zx9FdsJxuGAOmwn3iUYGtCFUh6gssrol1YKB24HzwO EaY+Fy+l6TvU+rhJ4uupvkBN3IA8mgSSrzVZRn3wgTKWbaUOQ50RAw1/WlISw4du7GCa nq86MSPYqGwwnq+g9pF1fVxhjd9QdwO8oNWbO0Bn+5Zbzx4V/H6WMH1X+UlabMXHSYea L0rw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=BvzSCUf7kB4XkoILmKxoGrpYyGgCmThgZ4QUA+LFwJo=; b=gYFgPssN4TDkTjS5hoYNG3BQfJ/e0WsOmcZlBOdQXLDgiELNibB/TMAxzVnshS3G7b PVoPWaAHigH7WHSFxzPQYQvBuvtFokyJjG3AQzyIZgcw8VnpwvqCSQFMdlW8NSP13Knt zReauVHU1cV70EWDtP4OjuH+Pkclju0My+kM3kGU9OFq45KHg/QnsrTbl+PPjsSK85HH Qit4BCWD6UTQgpaMqHUx06XfBi66iwatbDMwAgHe3F+zZqm5sXmzzhCxwdPCfGJi4gp0 MG1+59I4bad7wXkbfxSGlQO6PsJe6R+116L+chgSc8NOC9RD2bK8zzwpPPd6XtFL8hZn IReQ== X-Gm-Message-State: AA6/9Rl6FmPf9RPHt5o+pldv27XX3K5vu5U08MPQX8scfL5LO3bS/GVJcX4niU7T8yMXDg== X-Received: by 10.194.133.170 with SMTP id pd10mr2034598wjb.97.1475163376050; Thu, 29 Sep 2016 08:36:16 -0700 (PDT) Received: from localhost.localdomain ([2a02:c7d:9b6d:e300:916a:6cab:ac67:71c2]) by smtp.gmail.com with ESMTPSA id s7sm14781924wjc.34.2016.09.29.08.36.15 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 29 Sep 2016 08:36:15 -0700 (PDT) From: Tvrtko Ursulin X-Google-Original-From: Tvrtko Ursulin To: Intel-gfx@lists.freedesktop.org Date: Thu, 29 Sep 2016 16:35:54 +0100 Message-Id: <1475163356-3463-12-git-send-email-tvrtko.ursulin@linux.intel.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1475163356-3463-1-git-send-email-tvrtko.ursulin@linux.intel.com> References: <1475163356-3463-1-git-send-email-tvrtko.ursulin@linux.intel.com> Subject: [Intel-gfx] [PATCH 11/13] drm/i915: Remove identical write mmmio functions X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Virus-Scanned: ClamAV using ClamSMTP From: Tvrtko Ursulin We notice two identical copies of the shadow register table and following from that removal can also unify CHV and Gen9 write mmio functions and macros into a single implementation. Signed-off-by: Tvrtko Ursulin Reviewed-by: Joonas Lahtinen --- drivers/gpu/drm/i915/intel_uncore.c | 69 +++++++------------------------------ 1 file changed, 12 insertions(+), 57 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_uncore.c b/drivers/gpu/drm/i915/intel_uncore.c index 4f9f57774e2a..893d73c7368a 100644 --- a/drivers/gpu/drm/i915/intel_uncore.c +++ b/drivers/gpu/drm/i915/intel_uncore.c @@ -706,7 +706,7 @@ static const struct intel_forcewake_range __chv_fw_ranges[] = { GEN_FW_RANGE(0x30000, 0x37fff, FORCEWAKE_MEDIA), }; -#define __chv_reg_write_fw_domains(offset) \ +#define __fwtbl_reg_write_fw_domains(offset) \ ({ \ enum forcewake_domains __fwd = 0; \ if (NEEDS_FORCE_WAKE((offset)) && !is_gen8_shadowed(offset)) \ @@ -750,34 +750,6 @@ static const struct intel_forcewake_range __gen9_fw_ranges[] = { GEN_FW_RANGE(0x30000, 0x3ffff, FORCEWAKE_MEDIA), }; -static const i915_reg_t gen9_shadowed_regs[] = { - RING_TAIL(RENDER_RING_BASE), - RING_TAIL(GEN6_BSD_RING_BASE), - RING_TAIL(VEBOX_RING_BASE), - RING_TAIL(BLT_RING_BASE), - GEN6_RPNSWREQ, - GEN6_RC_VIDEO_FREQ, - /* TODO: Other registers are not yet used */ -}; - -static bool is_gen9_shadowed(u32 offset) -{ - int i; - for (i = 0; i < ARRAY_SIZE(gen9_shadowed_regs); i++) - if (offset == gen9_shadowed_regs[i].reg) - return true; - - return false; -} - -#define __gen9_reg_write_fw_domains(offset) \ -({ \ - enum forcewake_domains __fwd = 0; \ - if (NEEDS_FORCE_WAKE((offset)) && !is_gen9_shadowed(offset)) \ - __fwd = find_fw_domain(dev_priv, offset); \ - __fwd; \ -}) - static void ilk_dummy_write(struct drm_i915_private *dev_priv) { @@ -1034,37 +1006,21 @@ gen8_write##x(struct drm_i915_private *dev_priv, i915_reg_t reg, u##x val, bool GEN6_WRITE_FOOTER; \ } -#define __chv_write(x) \ -static void \ -chv_write##x(struct drm_i915_private *dev_priv, i915_reg_t reg, u##x val, bool trace) { \ - enum forcewake_domains fw_engine; \ - GEN6_WRITE_HEADER; \ - fw_engine = __chv_reg_write_fw_domains(offset); \ - if (fw_engine) \ - __force_wake_auto(dev_priv, fw_engine); \ - __raw_i915_write##x(dev_priv, reg, val); \ - GEN6_WRITE_FOOTER; \ -} - -#define __gen9_write(x) \ +#define __fwtbl_write(x) \ static void \ -gen9_write##x(struct drm_i915_private *dev_priv, i915_reg_t reg, u##x val, \ - bool trace) { \ +fwtbl_write##x(struct drm_i915_private *dev_priv, i915_reg_t reg, u##x val, bool trace) { \ enum forcewake_domains fw_engine; \ GEN6_WRITE_HEADER; \ - fw_engine = __gen9_reg_write_fw_domains(offset); \ + fw_engine = __fwtbl_reg_write_fw_domains(offset); \ if (fw_engine) \ __force_wake_auto(dev_priv, fw_engine); \ __raw_i915_write##x(dev_priv, reg, val); \ GEN6_WRITE_FOOTER; \ } -__gen9_write(8) -__gen9_write(16) -__gen9_write(32) -__chv_write(8) -__chv_write(16) -__chv_write(32) +__fwtbl_write(8) +__fwtbl_write(16) +__fwtbl_write(32) __gen8_write(8) __gen8_write(16) __gen8_write(32) @@ -1072,8 +1028,7 @@ __gen6_write(8) __gen6_write(16) __gen6_write(32) -#undef __gen9_write -#undef __chv_write +#undef __fwtbl_write #undef __gen8_write #undef __gen6_write #undef GEN6_WRITE_FOOTER @@ -1284,13 +1239,13 @@ void intel_uncore_init(struct drm_i915_private *dev_priv) default: case 9: ASSIGN_FW_DOMAINS_TABLE(__gen9_fw_ranges); - ASSIGN_WRITE_MMIO_VFUNCS(gen9); + ASSIGN_WRITE_MMIO_VFUNCS(fwtbl); ASSIGN_READ_MMIO_VFUNCS(fwtbl); break; case 8: if (IS_CHERRYVIEW(dev_priv)) { ASSIGN_FW_DOMAINS_TABLE(__chv_fw_ranges); - ASSIGN_WRITE_MMIO_VFUNCS(chv); + ASSIGN_WRITE_MMIO_VFUNCS(fwtbl); ASSIGN_READ_MMIO_VFUNCS(fwtbl); } else { @@ -1819,11 +1774,11 @@ intel_uncore_forcewake_for_write(struct drm_i915_private *dev_priv, switch (INTEL_GEN(dev_priv)) { case 9: - fw_domains = __gen9_reg_write_fw_domains(i915_mmio_reg_offset(reg)); + fw_domains = __fwtbl_reg_write_fw_domains(i915_mmio_reg_offset(reg)); break; case 8: if (IS_CHERRYVIEW(dev_priv)) - fw_domains = __chv_reg_write_fw_domains(i915_mmio_reg_offset(reg)); + fw_domains = __fwtbl_reg_write_fw_domains(i915_mmio_reg_offset(reg)); else fw_domains = __gen8_reg_write_fw_domains(i915_mmio_reg_offset(reg)); break;