diff mbox

[07/10] drm/i915/gen9: Make skl_pipe_wm_get_hw_state() reusable

Message ID 1475885497-6094-8-git-send-email-cpaul@redhat.com (mailing list archive)
State New, archived
Headers show

Commit Message

cpaul@redhat.com Oct. 8, 2016, 12:11 a.m. UTC
There's not much of a reason this should have the locations to read out
the hardware state hardcoded, so allow the caller to specify the
location and add this function to intel_drv.h. As well, we're going to
need this function to be reusable for the next patch.

Signed-off-by: Lyude <cpaul@redhat.com>
Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: Paulo Zanoni <paulo.r.zanoni@intel.com>
---
 drivers/gpu/drm/i915/intel_drv.h |  2 ++
 drivers/gpu/drm/i915/intel_pm.c  | 27 +++++++++++++++++----------
 2 files changed, 19 insertions(+), 10 deletions(-)

Comments

Zanoni, Paulo R Oct. 13, 2016, 8:36 p.m. UTC | #1
Em Sex, 2016-10-07 às 20:11 -0400, Lyude escreveu:
> There's not much of a reason this should have the locations to read
> out
> the hardware state hardcoded, so allow the caller to specify the
> location and add this function to intel_drv.h. As well, we're going
> to
> need this function to be reusable for the next patch.
> 
> Signed-off-by: Lyude <cpaul@redhat.com>
> Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Cc: Paulo Zanoni <paulo.r.zanoni@intel.com>
> ---
>  drivers/gpu/drm/i915/intel_drv.h |  2 ++
>  drivers/gpu/drm/i915/intel_pm.c  | 27 +++++++++++++++++----------
>  2 files changed, 19 insertions(+), 10 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_drv.h
> b/drivers/gpu/drm/i915/intel_drv.h
> index 958dc72..73a2d16d 100644
> --- a/drivers/gpu/drm/i915/intel_drv.h
> +++ b/drivers/gpu/drm/i915/intel_drv.h
> @@ -1756,6 +1756,8 @@ void ilk_wm_get_hw_state(struct drm_device
> *dev);
>  void skl_wm_get_hw_state(struct drm_device *dev);
>  void skl_ddb_get_hw_state(struct drm_i915_private *dev_priv,
>  			  struct skl_ddb_allocation *ddb /* out */);
> +void skl_pipe_wm_get_hw_state(struct drm_crtc *crtc,
> +			      struct skl_pipe_wm *out);
>  bool intel_can_enable_sagv(struct drm_atomic_state *state);
>  int intel_enable_sagv(struct drm_i915_private *dev_priv);
>  int intel_disable_sagv(struct drm_i915_private *dev_priv);
> diff --git a/drivers/gpu/drm/i915/intel_pm.c
> b/drivers/gpu/drm/i915/intel_pm.c
> index 9e53ff7..27a520ce 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -4287,15 +4287,13 @@ static inline void
> skl_wm_level_from_reg_val(uint32_t val,
>  		PLANE_WM_LINES_MASK;
>  }
>  
> -static void skl_pipe_wm_get_hw_state(struct drm_crtc *crtc)
> +void skl_pipe_wm_get_hw_state(struct drm_crtc *crtc,
> +			      struct skl_pipe_wm *out)
>  {
>  	struct drm_device *dev = crtc->dev;
>  	struct drm_i915_private *dev_priv = to_i915(dev);
> -	struct skl_wm_values *hw = &dev_priv->wm.skl_hw;
>  	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
> -	struct intel_crtc_state *cstate = to_intel_crtc_state(crtc-
> >state);
>  	struct intel_plane *intel_plane;
> -	struct skl_pipe_wm *active = &cstate->wm.skl.optimal;
>  	struct skl_plane_wm *wm;
>  	enum pipe pipe = intel_crtc->pipe;
>  	int level, id, max_level = ilk_wm_max_level(dev);
> @@ -4303,7 +4301,7 @@ static void skl_pipe_wm_get_hw_state(struct
> drm_crtc *crtc)
>  
>  	for_each_intel_plane_on_crtc(dev, intel_crtc, intel_plane) {
>  		id = skl_wm_plane_id(intel_plane);
> -		wm = &cstate->wm.skl.optimal.planes[id];
> +		wm = &out->planes[id];
>  
>  		for (level = 0; level <= max_level; level++) {
>  			if (id != PLANE_CURSOR)
> @@ -4325,20 +4323,29 @@ static void skl_pipe_wm_get_hw_state(struct
> drm_crtc *crtc)
>  	if (!intel_crtc->active)
>  		return;
>  
> -	hw->dirty_pipes |= drm_crtc_mask(crtc);
> -	active->linetime = I915_READ(PIPE_WM_LINETIME(pipe));
> -	intel_crtc->wm.active.skl = *active;
> +	out->linetime = I915_READ(PIPE_WM_LINETIME(pipe));
>  }
>  
>  void skl_wm_get_hw_state(struct drm_device *dev)
>  {
>  	struct drm_i915_private *dev_priv = to_i915(dev);
> +	struct skl_wm_values *hw = &dev_priv->wm.skl_hw;
>  	struct skl_ddb_allocation *ddb = &dev_priv->wm.skl_hw.ddb;
>  	struct drm_crtc *crtc;
> +	struct intel_crtc *intel_crtc;
> +	struct intel_crtc_state *cstate;
>  
>  	skl_ddb_get_hw_state(dev_priv, ddb);
> -	list_for_each_entry(crtc, &dev->mode_config.crtc_list, head)
> -		skl_pipe_wm_get_hw_state(crtc);
> +	list_for_each_entry(crtc, &dev->mode_config.crtc_list, head)
> {
> +		intel_crtc = to_intel_crtc(crtc);
> +		cstate = to_intel_crtc_state(crtc->state);
> +
> +		skl_pipe_wm_get_hw_state(crtc, &cstate-
> >wm.skl.optimal);
> +		intel_crtc->wm.active.skl = cstate->wm.skl.optimal;

We're changing how the code behaves regarding intel_crtc-
>wm.active.skl. Previously we would only set it if intel_crtc->active
is true due to that return in skl_pipe_wm_get_hw_state(). Now we're
always setting it.

If this is some sort of fix it probably deserves to be in a separate
commit with a nice commit message.

> +
> +		if (!intel_crtc->active)
> +			hw->dirty_pipes |= drm_crtc_mask(crtc);

Same here: previously we would not set dirty_pipes in case !intel_crtc-
>active. Now we're doing the opposite. Didn't you mean "if (intel_crtc-
>active)" here?

> +	}
>  
>  	if (dev_priv->active_crtcs) {
>  		/* Fully recompute DDB on first atomic commit */
diff mbox

Patch

diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index 958dc72..73a2d16d 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -1756,6 +1756,8 @@  void ilk_wm_get_hw_state(struct drm_device *dev);
 void skl_wm_get_hw_state(struct drm_device *dev);
 void skl_ddb_get_hw_state(struct drm_i915_private *dev_priv,
 			  struct skl_ddb_allocation *ddb /* out */);
+void skl_pipe_wm_get_hw_state(struct drm_crtc *crtc,
+			      struct skl_pipe_wm *out);
 bool intel_can_enable_sagv(struct drm_atomic_state *state);
 int intel_enable_sagv(struct drm_i915_private *dev_priv);
 int intel_disable_sagv(struct drm_i915_private *dev_priv);
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 9e53ff7..27a520ce 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -4287,15 +4287,13 @@  static inline void skl_wm_level_from_reg_val(uint32_t val,
 		PLANE_WM_LINES_MASK;
 }
 
-static void skl_pipe_wm_get_hw_state(struct drm_crtc *crtc)
+void skl_pipe_wm_get_hw_state(struct drm_crtc *crtc,
+			      struct skl_pipe_wm *out)
 {
 	struct drm_device *dev = crtc->dev;
 	struct drm_i915_private *dev_priv = to_i915(dev);
-	struct skl_wm_values *hw = &dev_priv->wm.skl_hw;
 	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
-	struct intel_crtc_state *cstate = to_intel_crtc_state(crtc->state);
 	struct intel_plane *intel_plane;
-	struct skl_pipe_wm *active = &cstate->wm.skl.optimal;
 	struct skl_plane_wm *wm;
 	enum pipe pipe = intel_crtc->pipe;
 	int level, id, max_level = ilk_wm_max_level(dev);
@@ -4303,7 +4301,7 @@  static void skl_pipe_wm_get_hw_state(struct drm_crtc *crtc)
 
 	for_each_intel_plane_on_crtc(dev, intel_crtc, intel_plane) {
 		id = skl_wm_plane_id(intel_plane);
-		wm = &cstate->wm.skl.optimal.planes[id];
+		wm = &out->planes[id];
 
 		for (level = 0; level <= max_level; level++) {
 			if (id != PLANE_CURSOR)
@@ -4325,20 +4323,29 @@  static void skl_pipe_wm_get_hw_state(struct drm_crtc *crtc)
 	if (!intel_crtc->active)
 		return;
 
-	hw->dirty_pipes |= drm_crtc_mask(crtc);
-	active->linetime = I915_READ(PIPE_WM_LINETIME(pipe));
-	intel_crtc->wm.active.skl = *active;
+	out->linetime = I915_READ(PIPE_WM_LINETIME(pipe));
 }
 
 void skl_wm_get_hw_state(struct drm_device *dev)
 {
 	struct drm_i915_private *dev_priv = to_i915(dev);
+	struct skl_wm_values *hw = &dev_priv->wm.skl_hw;
 	struct skl_ddb_allocation *ddb = &dev_priv->wm.skl_hw.ddb;
 	struct drm_crtc *crtc;
+	struct intel_crtc *intel_crtc;
+	struct intel_crtc_state *cstate;
 
 	skl_ddb_get_hw_state(dev_priv, ddb);
-	list_for_each_entry(crtc, &dev->mode_config.crtc_list, head)
-		skl_pipe_wm_get_hw_state(crtc);
+	list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
+		intel_crtc = to_intel_crtc(crtc);
+		cstate = to_intel_crtc_state(crtc->state);
+
+		skl_pipe_wm_get_hw_state(crtc, &cstate->wm.skl.optimal);
+		intel_crtc->wm.active.skl = cstate->wm.skl.optimal;
+
+		if (!intel_crtc->active)
+			hw->dirty_pipes |= drm_crtc_mask(crtc);
+	}
 
 	if (dev_priv->active_crtcs) {
 		/* Fully recompute DDB on first atomic commit */