From patchwork Mon Nov 21 22:32:38 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lyude Paul X-Patchwork-Id: 9440187 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id D6C71606DB for ; Mon, 21 Nov 2016 22:32:53 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id C5D76289E0 for ; Mon, 21 Nov 2016 22:32:53 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id B951828AE7; Mon, 21 Nov 2016 22:32:53 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.2 required=2.0 tests=BAYES_00, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 7DD5C289E0 for ; Mon, 21 Nov 2016 22:32:53 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 913D66E5D7; Mon, 21 Nov 2016 22:32:50 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mx1.redhat.com (mx1.redhat.com [209.132.183.28]) by gabe.freedesktop.org (Postfix) with ESMTPS id BF5386E166 for ; Mon, 21 Nov 2016 22:32:43 +0000 (UTC) Received: from int-mx10.intmail.prod.int.phx2.redhat.com (int-mx10.intmail.prod.int.phx2.redhat.com [10.5.11.23]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 6ECB28F272 for ; Mon, 21 Nov 2016 22:32:43 +0000 (UTC) Received: from whitewolf.lyude.net.com (vpn-54-208.rdu2.redhat.com [10.10.54.208]) by int-mx10.intmail.prod.int.phx2.redhat.com (8.14.4/8.14.4) with ESMTP id uALMWfw9010112 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=NO); Mon, 21 Nov 2016 17:32:43 -0500 From: Lyude To: intel-gfx@lists.freedesktop.org Date: Mon, 21 Nov 2016 17:32:38 -0500 Message-Id: <1479767559-9654-3-git-send-email-lyude@redhat.com> In-Reply-To: <1479767559-9654-1-git-send-email-lyude@redhat.com> References: <1479767559-9654-1-git-send-email-lyude@redhat.com> X-Scanned-By: MIMEDefang 2.68 on 10.5.11.23 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.26]); Mon, 21 Nov 2016 22:32:43 +0000 (UTC) Cc: Lyude Subject: [Intel-gfx] [PATCH i-g-t 2/3] igt_kms: Change the max number of pipes to 6 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Virus-Scanned: ClamAV using ClamSMTP Unfortunately the assumption that we only have 6 display pipes available is specific to Intel, and seems to be breaking igt_display_init() on both radeon and nouveau since this causes us not to leave enough space in the igt_display_t struct to hold information for all 6 pipes. So, up the max to 6. As well, add IGT_MAX_PIPES and use that instead since this is no longer specific to Intel. We also leave I915_MAX_PIPES defined as 3 so as to not break existing tests relying on this. Signed-off-by: Lyude --- lib/igt_kms.h | 22 +++++++++++++++++++--- 1 file changed, 19 insertions(+), 3 deletions(-) diff --git a/lib/igt_kms.h b/lib/igt_kms.h index 95d81c3..0ea2454 100644 --- a/lib/igt_kms.h +++ b/lib/igt_kms.h @@ -46,7 +46,10 @@ * @PIPE_A: First crtc. * @PIPE_B: Second crtc. * @PIPE_C: Third crtc. - * @I915_MAX_PIPES: Max number of pipes allowed. + * @PIPE_D: Fourth crtc. + * @PIPE_E: Fifth crtc. + * @PIPE_F: Sixth crtc. + * @IGT_MAX_PIPES: Max number of pipes allowed. */ enum pipe { PIPE_NONE = -1, @@ -54,10 +57,23 @@ enum pipe { PIPE_A = 0, PIPE_B, PIPE_C, - I915_MAX_PIPES + PIPE_D, + PIPE_E, + PIPE_F, + IGT_MAX_PIPES, }; const char *kmstest_pipe_name(enum pipe pipe); +/** + * I915_MAX_PIPES: + * + * The max number of pipes on i915 devices. This should only be used for tests + * which are guaranteed to only be used on intel hardware. All other tests + * should use @IGT_MAX_PIPES and/or check the number of reported pipes on the + * hardware. + */ +#define I915_MAX_PIPES 3 + /* We namespace this enum to not conflict with the Android i915_drm.h */ enum igt_plane { IGT_PLANE_1 = 0, @@ -310,7 +326,7 @@ struct igt_display { int n_outputs; unsigned long pipes_in_use; igt_output_t *outputs; - igt_pipe_t pipes[I915_MAX_PIPES]; + igt_pipe_t pipes[IGT_MAX_PIPES]; bool has_universal_planes; bool has_cursor_plane; bool is_atomic;