From patchwork Thu Nov 24 16:13:20 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Arkadiusz Hiler X-Patchwork-Id: 9445985 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 7446E60235 for ; Thu, 24 Nov 2016 16:13:50 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 660992808C for ; Thu, 24 Nov 2016 16:13:50 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 59FE8280DE; Thu, 24 Nov 2016 16:13:50 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.2 required=2.0 tests=BAYES_00, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 61FD32808C for ; Thu, 24 Nov 2016 16:13:49 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 3C4516EB09; Thu, 24 Nov 2016 16:13:48 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga05.intel.com (mga05.intel.com [192.55.52.43]) by gabe.freedesktop.org (Postfix) with ESMTPS id DB0EC6EB08 for ; Thu, 24 Nov 2016 16:13:37 +0000 (UTC) Received: from fmsmga003.fm.intel.com ([10.253.24.29]) by fmsmga105.fm.intel.com with ESMTP; 24 Nov 2016 08:13:37 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.31,543,1473145200"; d="scan'208";a="790370777" Received: from ahiler-desk.igk.intel.com ([172.28.171.151]) by FMSMGA003.fm.intel.com with ESMTP; 24 Nov 2016 08:13:32 -0800 From: Arkadiusz Hiler To: intel-gfx@lists.freedesktop.org Date: Thu, 24 Nov 2016 17:13:20 +0100 Message-Id: <1480004003-27377-3-git-send-email-arkadiusz.hiler@intel.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1480004003-27377-1-git-send-email-arkadiusz.hiler@intel.com> References: <1480004003-27377-1-git-send-email-arkadiusz.hiler@intel.com> Organization: Intel Technology Poland sp. z o.o. - KRS 101882 - ul. Slowackiego 173, 80-298 Gdansk Subject: [Intel-gfx] [PATCH 2/5] drm/i915/guc: Drop guc2host/host2guc from names X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Virus-Scanned: ClamAV using ClamSMTP To facilitate code reorganization we are renaming everything that contains guc2host or host2guc. host2guc_action() and host2guc_action_response() become guc_send() and guc_recv() respectively. Other host2guc_*() functions become simply guc_*(). Other entities are renamed basing on context they appear in: - HOST2GUC_ACTIONS_& become INTEL_GUC_ACTION_* - HOST2GUC_{INTERRUPT,TRIGGER} become GUC_SEND_{INTERRUPT,TRIGGER} - GUC2HOST_* become INTEL_GUC_RECV_* - action_lock becomes send_mutex Cc: Chris Wilson Cc: Michal Winiarski Signed-off-by: Arkadiusz Hiler --- drivers/gpu/drm/i915/i915_guc_reg.h | 4 +- drivers/gpu/drm/i915/i915_guc_submission.c | 91 +++++++++++++++--------------- drivers/gpu/drm/i915/i915_irq.c | 4 +- drivers/gpu/drm/i915/intel_guc_fwif.h | 49 ++++++++-------- drivers/gpu/drm/i915/intel_uc.h | 6 +- 5 files changed, 78 insertions(+), 76 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_guc_reg.h b/drivers/gpu/drm/i915/i915_guc_reg.h index a47e1e4..5e638fc 100644 --- a/drivers/gpu/drm/i915/i915_guc_reg.h +++ b/drivers/gpu/drm/i915/i915_guc_reg.h @@ -100,8 +100,8 @@ GUC_ENABLE_READ_CACHE_FOR_WOPCM_DATA | \ GUC_ENABLE_MIA_CLOCK_GATING) -#define HOST2GUC_INTERRUPT _MMIO(0xc4c8) -#define HOST2GUC_TRIGGER (1<<0) +#define GUC_SEND_INTERRUPT _MMIO(0xc4c8) +#define GUC_SEND_TRIGGER (1<<0) #define GEN8_DRBREGL(x) _MMIO(0x1000 + (x) * 8) #define GEN8_DRB_VALID (1<<0) diff --git a/drivers/gpu/drm/i915/i915_guc_submission.c b/drivers/gpu/drm/i915/i915_guc_submission.c index e14220e..f8957df 100644 --- a/drivers/gpu/drm/i915/i915_guc_submission.c +++ b/drivers/gpu/drm/i915/i915_guc_submission.c @@ -49,7 +49,7 @@ * Firmware writes a success/fail code back to the action register after * processes the request. The kernel driver polls waiting for this update and * then proceeds. - * See host2guc_action() + * See guc_send() * * Doorbells: * Doorbells are interrupts to uKernel. A doorbell is a single cache line (QW) @@ -69,15 +69,14 @@ * Read GuC command/status register (SOFT_SCRATCH_0) * Return true if it contains a response rather than a command */ -static inline bool host2guc_action_response(struct drm_i915_private *dev_priv, - u32 *status) +static inline bool guc_recv(struct drm_i915_private *dev_priv, u32 *status) { u32 val = I915_READ(SOFT_SCRATCH(0)); *status = val; - return GUC2HOST_IS_RESPONSE(val); + return INTEL_GUC_RECV_IS_RESPONSE(val); } -static int host2guc_action(struct intel_guc *guc, u32 *data, u32 len) +static int guc_send(struct intel_guc *guc, u32 *data, u32 len) { struct drm_i915_private *dev_priv = guc_to_i915(guc); u32 status; @@ -87,7 +86,7 @@ static int host2guc_action(struct intel_guc *guc, u32 *data, u32 len) if (WARN_ON(len < 1 || len > 15)) return -EINVAL; - mutex_lock(&guc->action_lock); + mutex_lock(&guc->send_mutex); intel_uncore_forcewake_get(dev_priv, FORCEWAKE_ALL); dev_priv->guc.action_count += 1; @@ -98,17 +97,17 @@ static int host2guc_action(struct intel_guc *guc, u32 *data, u32 len) POSTING_READ(SOFT_SCRATCH(i - 1)); - I915_WRITE(HOST2GUC_INTERRUPT, HOST2GUC_TRIGGER); + I915_WRITE(GUC_SEND_INTERRUPT, GUC_SEND_TRIGGER); /* * Fast commands should complete in less than 10us, so sample quickly * up to that length of time, then switch to a slower sleep-wait loop. - * No HOST2GUC command should ever take longer than 10ms. + * No INTEL_GUC_ACTION command should ever take longer than 10ms. */ - ret = wait_for_us(host2guc_action_response(dev_priv, &status), 10); + ret = wait_for_us(guc_recv(dev_priv, &status), 10); if (ret) - ret = wait_for(host2guc_action_response(dev_priv, &status), 10); - if (status != GUC2HOST_STATUS_SUCCESS) { + ret = wait_for(guc_recv(dev_priv, &status), 10); + if (status != INTEL_GUC_RECV_STATUS_SUCCESS) { /* * Either the GuC explicitly returned an error (which * we convert to -EIO here) or no response at all was @@ -126,7 +125,7 @@ static int host2guc_action(struct intel_guc *guc, u32 *data, u32 len) dev_priv->guc.action_status = status; intel_uncore_forcewake_put(dev_priv, FORCEWAKE_ALL); - mutex_unlock(&guc->action_lock); + mutex_unlock(&guc->send_mutex); return ret; } @@ -135,35 +134,35 @@ static int host2guc_action(struct intel_guc *guc, u32 *data, u32 len) * Tell the GuC to allocate or deallocate a specific doorbell */ -static int host2guc_allocate_doorbell(struct intel_guc *guc, - struct i915_guc_client *client) +static int guc_allocate_doorbell(struct intel_guc *guc, + struct i915_guc_client *client) { u32 data[2]; - data[0] = HOST2GUC_ACTION_ALLOCATE_DOORBELL; + data[0] = INTEL_GUC_ACTION_ALLOCATE_DOORBELL; data[1] = client->ctx_index; - return host2guc_action(guc, data, 2); + return guc_send(guc, data, 2); } -static int host2guc_release_doorbell(struct intel_guc *guc, - struct i915_guc_client *client) +static int guc_release_doorbell(struct intel_guc *guc, + struct i915_guc_client *client) { u32 data[2]; - data[0] = HOST2GUC_ACTION_DEALLOCATE_DOORBELL; + data[0] = INTEL_GUC_ACTION_DEALLOCATE_DOORBELL; data[1] = client->ctx_index; - return host2guc_action(guc, data, 2); + return guc_send(guc, data, 2); } -static int host2guc_sample_forcewake(struct intel_guc *guc, - struct i915_guc_client *client) +static int guc_sample_forcewake(struct intel_guc *guc, + struct i915_guc_client *client) { struct drm_i915_private *dev_priv = guc_to_i915(guc); u32 data[2]; - data[0] = HOST2GUC_ACTION_SAMPLE_FORCEWAKE; + data[0] = INTEL_GUC_ACTION_SAMPLE_FORCEWAKE; /* WaRsDisableCoarsePowerGating:skl,bxt */ if (!intel_enable_rc6() || NEEDS_WaRsDisableCoarsePowerGating(dev_priv)) data[1] = 0; @@ -171,36 +170,36 @@ static int host2guc_sample_forcewake(struct intel_guc *guc, /* bit 0 and 1 are for Render and Media domain separately */ data[1] = GUC_FORCEWAKE_RENDER | GUC_FORCEWAKE_MEDIA; - return host2guc_action(guc, data, ARRAY_SIZE(data)); + return guc_send(guc, data, ARRAY_SIZE(data)); } -static int host2guc_logbuffer_flush_complete(struct intel_guc *guc) +static int guc_logbuffer_flush_complete(struct intel_guc *guc) { u32 data[1]; - data[0] = HOST2GUC_ACTION_LOG_BUFFER_FILE_FLUSH_COMPLETE; + data[0] = INTEL_GUC_ACTION_LOG_BUFFER_FILE_FLUSH_COMPLETE; - return host2guc_action(guc, data, 1); + return guc_send(guc, data, 1); } -static int host2guc_force_logbuffer_flush(struct intel_guc *guc) +static int guc_force_logbuffer_flush(struct intel_guc *guc) { u32 data[2]; - data[0] = HOST2GUC_ACTION_FORCE_LOG_BUFFER_FLUSH; + data[0] = INTEL_GUC_ACTION_FORCE_LOG_BUFFER_FLUSH; data[1] = 0; - return host2guc_action(guc, data, 2); + return guc_send(guc, data, 2); } -static int host2guc_logging_control(struct intel_guc *guc, u32 control_val) +static int guc_logging_control(struct intel_guc *guc, u32 control_val) { u32 data[2]; - data[0] = HOST2GUC_ACTION_UK_LOG_ENABLE_LOGGING; + data[0] = INTEL_GUC_ACTION_UK_LOG_ENABLE_LOGGING; data[1] = control_val; - return host2guc_action(guc, data, 2); + return guc_send(guc, data, 2); } /* @@ -226,7 +225,7 @@ static int guc_update_doorbell_id(struct intel_guc *guc, test_bit(client->doorbell_id, doorbell_bitmap)) { /* Deactivate the old doorbell */ doorbell->db_status = GUC_DOORBELL_DISABLED; - (void)host2guc_release_doorbell(guc, client); + (void)guc_release_doorbell(guc, client); __clear_bit(client->doorbell_id, doorbell_bitmap); } @@ -249,7 +248,7 @@ static int guc_update_doorbell_id(struct intel_guc *guc, __set_bit(new_id, doorbell_bitmap); doorbell->cookie = 0; doorbell->db_status = GUC_DOORBELL_ENABLED; - return host2guc_allocate_doorbell(guc, client); + return guc_allocate_doorbell(guc, client); } static int guc_init_doorbell(struct intel_guc *guc, @@ -298,7 +297,7 @@ select_doorbell_register(struct intel_guc *guc, uint32_t priority) * Select, assign and relase doorbell cachelines * * These functions track which doorbell cachelines are in use. - * The data they manipulate is protected by the host2guc lock. + * The data they manipulate is protected by the guc_send lock. */ static uint32_t select_doorbell_cacheline(struct intel_guc *guc) @@ -1500,7 +1499,7 @@ int i915_guc_submission_init(struct drm_i915_private *dev_priv) guc->ctx_pool_vma = vma; ida_init(&guc->ctx_ids); - mutex_init(&guc->action_lock); + mutex_init(&guc->send_mutex); guc_log_create(guc); guc_addon_create(guc); @@ -1526,7 +1525,7 @@ int i915_guc_submission_enable(struct drm_i915_private *dev_priv) } guc->execbuf_client = client; - host2guc_sample_forcewake(guc, client); + guc_sample_forcewake(guc, client); guc_init_doorbell_hw(guc); /* Take over from manual control of ELSP (execlists) */ @@ -1590,13 +1589,13 @@ int intel_guc_suspend(struct drm_device *dev) ctx = dev_priv->kernel_context; - data[0] = HOST2GUC_ACTION_ENTER_S_STATE; + data[0] = INTEL_GUC_ACTION_ENTER_S_STATE; /* any value greater than GUC_POWER_D0 */ data[1] = GUC_POWER_D1; /* first page is shared data with GuC */ data[2] = i915_ggtt_offset(ctx->engine[RCS].state); - return host2guc_action(guc, data, ARRAY_SIZE(data)); + return guc_send(guc, data, ARRAY_SIZE(data)); } @@ -1619,12 +1618,12 @@ int intel_guc_resume(struct drm_device *dev) ctx = dev_priv->kernel_context; - data[0] = HOST2GUC_ACTION_EXIT_S_STATE; + data[0] = INTEL_GUC_ACTION_EXIT_S_STATE; data[1] = GUC_POWER_D0; /* first page is shared data with GuC */ data[2] = i915_ggtt_offset(ctx->engine[RCS].state); - return host2guc_action(guc, data, ARRAY_SIZE(data)); + return guc_send(guc, data, ARRAY_SIZE(data)); } void i915_guc_capture_logs(struct drm_i915_private *dev_priv) @@ -1635,7 +1634,7 @@ void i915_guc_capture_logs(struct drm_i915_private *dev_priv) * time, so get/put should be really quick. */ intel_runtime_pm_get(dev_priv); - host2guc_logbuffer_flush_complete(&dev_priv->guc); + guc_logbuffer_flush_complete(&dev_priv->guc); intel_runtime_pm_put(dev_priv); } @@ -1653,7 +1652,7 @@ void i915_guc_flush_logs(struct drm_i915_private *dev_priv) flush_work(&dev_priv->guc.log.flush_work); /* Ask GuC to update the log buffer state */ - host2guc_force_logbuffer_flush(&dev_priv->guc); + guc_force_logbuffer_flush(&dev_priv->guc); /* GuC would have updated log buffer by now, so capture it */ i915_guc_capture_logs(dev_priv); @@ -1694,9 +1693,9 @@ int i915_guc_log_control(struct drm_i915_private *dev_priv, u64 control_val) if (!log_param.logging_enabled && (i915.guc_log_level < 0)) return 0; - ret = host2guc_logging_control(&dev_priv->guc, log_param.value); + ret = guc_logging_control(&dev_priv->guc, log_param.value); if (ret < 0) { - DRM_DEBUG_DRIVER("host2guc action failed %d\n", ret); + DRM_DEBUG_DRIVER("guc_logging_control action failed %d\n", ret); return ret; } diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c index 07ca71c..0b119b9 100644 --- a/drivers/gpu/drm/i915/i915_irq.c +++ b/drivers/gpu/drm/i915/i915_irq.c @@ -1683,8 +1683,8 @@ static void gen9_guc_irq_handler(struct drm_i915_private *dev_priv, u32 gt_iir) u32 msg, flush; msg = I915_READ(SOFT_SCRATCH(15)); - flush = msg & (GUC2HOST_MSG_CRASH_DUMP_POSTED | - GUC2HOST_MSG_FLUSH_LOG_BUFFER); + flush = msg & (INTEL_GUC_RECV_MSG_CRASH_DUMP_POSTED | + INTEL_GUC_RECV_MSG_FLUSH_LOG_BUFFER); if (flush) { /* Clear the message bits that are handled */ I915_WRITE(SOFT_SCRATCH(15), msg & ~flush); diff --git a/drivers/gpu/drm/i915/intel_guc_fwif.h b/drivers/gpu/drm/i915/intel_guc_fwif.h index 324ea90..42234ff 100644 --- a/drivers/gpu/drm/i915/intel_guc_fwif.h +++ b/drivers/gpu/drm/i915/intel_guc_fwif.h @@ -489,18 +489,18 @@ union guc_log_control { } __packed; /* This Action will be programmed in C180 - SOFT_SCRATCH_O_REG */ -enum host2guc_action { - HOST2GUC_ACTION_DEFAULT = 0x0, - HOST2GUC_ACTION_SAMPLE_FORCEWAKE = 0x6, - HOST2GUC_ACTION_ALLOCATE_DOORBELL = 0x10, - HOST2GUC_ACTION_DEALLOCATE_DOORBELL = 0x20, - HOST2GUC_ACTION_LOG_BUFFER_FILE_FLUSH_COMPLETE = 0x30, - HOST2GUC_ACTION_FORCE_LOG_BUFFER_FLUSH = 0x302, - HOST2GUC_ACTION_ENTER_S_STATE = 0x501, - HOST2GUC_ACTION_EXIT_S_STATE = 0x502, - HOST2GUC_ACTION_SLPC_REQUEST = 0x3003, - HOST2GUC_ACTION_UK_LOG_ENABLE_LOGGING = 0x0E000, - HOST2GUC_ACTION_LIMIT +enum intel_guc_send_action { + INTEL_GUC_ACTION_DEFAULT = 0x0, + INTEL_GUC_ACTION_SAMPLE_FORCEWAKE = 0x6, + INTEL_GUC_ACTION_ALLOCATE_DOORBELL = 0x10, + INTEL_GUC_ACTION_DEALLOCATE_DOORBELL = 0x20, + INTEL_GUC_ACTION_LOG_BUFFER_FILE_FLUSH_COMPLETE = 0x30, + INTEL_GUC_ACTION_FORCE_LOG_BUFFER_FLUSH = 0x302, + INTEL_GUC_ACTION_ENTER_S_STATE = 0x501, + INTEL_GUC_ACTION_EXIT_S_STATE = 0x502, + INTEL_GUC_ACTION_SLPC_REQUEST = 0x3003, + INTEL_GUC_ACTION_UK_LOG_ENABLE_LOGGING = 0x0E000, + INTEL_GUC_ACTION_LIMIT }; /* @@ -509,22 +509,25 @@ enum host2guc_action { * by the fact that all the MASK bits are set. The remaining bits * give more detail. */ -#define GUC2HOST_RESPONSE_MASK ((u32)0xF0000000) -#define GUC2HOST_IS_RESPONSE(x) ((u32)(x) >= GUC2HOST_RESPONSE_MASK) -#define GUC2HOST_STATUS(x) (GUC2HOST_RESPONSE_MASK | (x)) +#define INTEL_GUC_RECV_MASK ((u32)0xF0000000) +#define INTEL_GUC_RECV_IS_RESPONSE(x) ((u32)(x) >= INTEL_GUC_RECV_MASK) +#define INTEL_GUC_RECV_STATUS(x) (INTEL_GUC_RECV_MASK | (x)) /* GUC will return status back to SOFT_SCRATCH_O_REG */ -enum guc2host_status { - GUC2HOST_STATUS_SUCCESS = GUC2HOST_STATUS(0x0), - GUC2HOST_STATUS_ALLOCATE_DOORBELL_FAIL = GUC2HOST_STATUS(0x10), - GUC2HOST_STATUS_DEALLOCATE_DOORBELL_FAIL = GUC2HOST_STATUS(0x20), - GUC2HOST_STATUS_GENERIC_FAIL = GUC2HOST_STATUS(0x0000F000) +enum intel_guc_recv_status { + INTEL_GUC_RECV_STATUS_SUCCESS = INTEL_GUC_RECV_STATUS(0x0), + INTEL_GUC_RECV_STATUS_ALLOCATE_DOORBELL_FAIL = \ + INTEL_GUC_RECV_STATUS(0x10), + INTEL_GUC_RECV_STATUS_DEALLOCATE_DOORBELL_FAIL = \ + INTEL_GUC_RECV_STATUS(0x20), + INTEL_GUC_RECV_STATUS_GENERIC_FAIL = \ + INTEL_GUC_RECV_STATUS(0x0000F000) }; /* This action will be programmed in C1BC - SOFT_SCRATCH_15_REG */ -enum guc2host_message { - GUC2HOST_MSG_CRASH_DUMP_POSTED = (1 << 1), - GUC2HOST_MSG_FLUSH_LOG_BUFFER = (1 << 3) +enum intel_guc_recv_message { + INTEL_GUC_RECV_MSG_CRASH_DUMP_POSTED = (1 << 1), + INTEL_GUC_RECV_MSG_FLUSH_LOG_BUFFER = (1 << 3) }; #endif diff --git a/drivers/gpu/drm/i915/intel_uc.h b/drivers/gpu/drm/i915/intel_uc.h index 0d8a493..4b4a91e 100644 --- a/drivers/gpu/drm/i915/intel_uc.h +++ b/drivers/gpu/drm/i915/intel_uc.h @@ -142,7 +142,7 @@ struct intel_guc { struct intel_guc_fw guc_fw; struct intel_guc_log log; - /* GuC2Host interrupt related state */ + /* intel_guc_recv interrupt related state */ bool interrupts_enabled; struct i915_vma *ads_vma; @@ -164,8 +164,8 @@ struct intel_guc { uint64_t submissions[I915_NUM_ENGINES]; uint32_t last_seqno[I915_NUM_ENGINES]; - /* To serialize the Host2GuC actions */ - struct mutex action_lock; + /* To serialize the intel_guc_send actions */ + struct mutex send_mutex; }; /* intel_guc_loader.c */