From patchwork Thu Nov 24 16:13:21 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Arkadiusz Hiler X-Patchwork-Id: 9445991 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 701CB60235 for ; Thu, 24 Nov 2016 16:13:56 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 60F2E2808C for ; Thu, 24 Nov 2016 16:13:56 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 559ED280D0; Thu, 24 Nov 2016 16:13:56 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.2 required=2.0 tests=BAYES_00, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 6BC6D2808C for ; Thu, 24 Nov 2016 16:13:55 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 2A3A36EB0C; Thu, 24 Nov 2016 16:13:49 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga05.intel.com (mga05.intel.com [192.55.52.43]) by gabe.freedesktop.org (Postfix) with ESMTPS id B25ED6EB08 for ; Thu, 24 Nov 2016 16:13:38 +0000 (UTC) Received: from fmsmga003.fm.intel.com ([10.253.24.29]) by fmsmga105.fm.intel.com with ESMTP; 24 Nov 2016 08:13:38 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.31,543,1473145200"; d="scan'208";a="790370790" Received: from ahiler-desk.igk.intel.com ([172.28.171.151]) by FMSMGA003.fm.intel.com with ESMTP; 24 Nov 2016 08:13:34 -0800 From: Arkadiusz Hiler To: intel-gfx@lists.freedesktop.org Date: Thu, 24 Nov 2016 17:13:21 +0100 Message-Id: <1480004003-27377-4-git-send-email-arkadiusz.hiler@intel.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1480004003-27377-1-git-send-email-arkadiusz.hiler@intel.com> References: <1480004003-27377-1-git-send-email-arkadiusz.hiler@intel.com> MIME-Version: 1.0 Organization: Intel Technology Poland sp. z o.o. - KRS 101882 - ul. Slowackiego 173, 80-298 Gdansk Subject: [Intel-gfx] [PATCH 3/5] drm/i915/guc: Move guc_{send, recv}() to intel_uc.c X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Virus-Scanned: ClamAV using ClamSMTP guc_send(), guc_recv() and related functions were introduced in the i915_guc_submission.c and their scope was limited only to that file. Those are not submission specific though. This patch moves moves them to intel_uc.c with intel_ prefix added. Cc: Chris Wilson Cc: Michal Winiarski Signed-off-by: Arkadiusz Hiler --- drivers/gpu/drm/i915/Makefile | 3 +- drivers/gpu/drm/i915/i915_guc_submission.c | 131 +++------------------------ drivers/gpu/drm/i915/intel_uc.c | 138 +++++++++++++++++++++++++++++ drivers/gpu/drm/i915/intel_uc.h | 9 ++ 4 files changed, 159 insertions(+), 122 deletions(-) create mode 100644 drivers/gpu/drm/i915/intel_uc.c diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile index 580602d..3c30916 100644 --- a/drivers/gpu/drm/i915/Makefile +++ b/drivers/gpu/drm/i915/Makefile @@ -55,7 +55,8 @@ i915-y += i915_cmd_parser.o \ intel_uncore.o # general-purpose microcontroller (GuC) support -i915-y += intel_guc_loader.o \ +i915-y += intel_uc.o \ + intel_guc_loader.o \ i915_guc_submission.o # autogenerated null render state diff --git a/drivers/gpu/drm/i915/i915_guc_submission.c b/drivers/gpu/drm/i915/i915_guc_submission.c index f8957df..d1f0d6d 100644 --- a/drivers/gpu/drm/i915/i915_guc_submission.c +++ b/drivers/gpu/drm/i915/i915_guc_submission.c @@ -49,7 +49,7 @@ * Firmware writes a success/fail code back to the action register after * processes the request. The kernel driver polls waiting for this update and * then proceeds. - * See guc_send() + * See intel_guc_send() * * Doorbells: * Doorbells are interrupts to uKernel. A doorbell is a single cache line (QW) @@ -66,71 +66,6 @@ */ /* - * Read GuC command/status register (SOFT_SCRATCH_0) - * Return true if it contains a response rather than a command - */ -static inline bool guc_recv(struct drm_i915_private *dev_priv, u32 *status) -{ - u32 val = I915_READ(SOFT_SCRATCH(0)); - *status = val; - return INTEL_GUC_RECV_IS_RESPONSE(val); -} - -static int guc_send(struct intel_guc *guc, u32 *data, u32 len) -{ - struct drm_i915_private *dev_priv = guc_to_i915(guc); - u32 status; - int i; - int ret; - - if (WARN_ON(len < 1 || len > 15)) - return -EINVAL; - - mutex_lock(&guc->send_mutex); - intel_uncore_forcewake_get(dev_priv, FORCEWAKE_ALL); - - dev_priv->guc.action_count += 1; - dev_priv->guc.action_cmd = data[0]; - - for (i = 0; i < len; i++) - I915_WRITE(SOFT_SCRATCH(i), data[i]); - - POSTING_READ(SOFT_SCRATCH(i - 1)); - - I915_WRITE(GUC_SEND_INTERRUPT, GUC_SEND_TRIGGER); - - /* - * Fast commands should complete in less than 10us, so sample quickly - * up to that length of time, then switch to a slower sleep-wait loop. - * No INTEL_GUC_ACTION command should ever take longer than 10ms. - */ - ret = wait_for_us(guc_recv(dev_priv, &status), 10); - if (ret) - ret = wait_for(guc_recv(dev_priv, &status), 10); - if (status != INTEL_GUC_RECV_STATUS_SUCCESS) { - /* - * Either the GuC explicitly returned an error (which - * we convert to -EIO here) or no response at all was - * received within the timeout limit (-ETIMEDOUT) - */ - if (ret != -ETIMEDOUT) - ret = -EIO; - - DRM_WARN("Action 0x%X failed; ret=%d status=0x%08X response=0x%08X\n", - data[0], ret, status, I915_READ(SOFT_SCRATCH(15))); - - dev_priv->guc.action_fail += 1; - dev_priv->guc.action_err = ret; - } - dev_priv->guc.action_status = status; - - intel_uncore_forcewake_put(dev_priv, FORCEWAKE_ALL); - mutex_unlock(&guc->send_mutex); - - return ret; -} - -/* * Tell the GuC to allocate or deallocate a specific doorbell */ @@ -142,7 +77,7 @@ static int guc_allocate_doorbell(struct intel_guc *guc, data[0] = INTEL_GUC_ACTION_ALLOCATE_DOORBELL; data[1] = client->ctx_index; - return guc_send(guc, data, 2); + return intel_guc_send(guc, data, 2); } static int guc_release_doorbell(struct intel_guc *guc, @@ -153,53 +88,7 @@ static int guc_release_doorbell(struct intel_guc *guc, data[0] = INTEL_GUC_ACTION_DEALLOCATE_DOORBELL; data[1] = client->ctx_index; - return guc_send(guc, data, 2); -} - -static int guc_sample_forcewake(struct intel_guc *guc, - struct i915_guc_client *client) -{ - struct drm_i915_private *dev_priv = guc_to_i915(guc); - u32 data[2]; - - data[0] = INTEL_GUC_ACTION_SAMPLE_FORCEWAKE; - /* WaRsDisableCoarsePowerGating:skl,bxt */ - if (!intel_enable_rc6() || NEEDS_WaRsDisableCoarsePowerGating(dev_priv)) - data[1] = 0; - else - /* bit 0 and 1 are for Render and Media domain separately */ - data[1] = GUC_FORCEWAKE_RENDER | GUC_FORCEWAKE_MEDIA; - - return guc_send(guc, data, ARRAY_SIZE(data)); -} - -static int guc_logbuffer_flush_complete(struct intel_guc *guc) -{ - u32 data[1]; - - data[0] = INTEL_GUC_ACTION_LOG_BUFFER_FILE_FLUSH_COMPLETE; - - return guc_send(guc, data, 1); -} - -static int guc_force_logbuffer_flush(struct intel_guc *guc) -{ - u32 data[2]; - - data[0] = INTEL_GUC_ACTION_FORCE_LOG_BUFFER_FLUSH; - data[1] = 0; - - return guc_send(guc, data, 2); -} - -static int guc_logging_control(struct intel_guc *guc, u32 control_val) -{ - u32 data[2]; - - data[0] = INTEL_GUC_ACTION_UK_LOG_ENABLE_LOGGING; - data[1] = control_val; - - return guc_send(guc, data, 2); + return intel_guc_send(guc, data, 2); } /* @@ -297,7 +186,7 @@ select_doorbell_register(struct intel_guc *guc, uint32_t priority) * Select, assign and relase doorbell cachelines * * These functions track which doorbell cachelines are in use. - * The data they manipulate is protected by the guc_send lock. + * The data they manipulate is protected by the intel_guc_send lock. */ static uint32_t select_doorbell_cacheline(struct intel_guc *guc) @@ -1525,7 +1414,7 @@ int i915_guc_submission_enable(struct drm_i915_private *dev_priv) } guc->execbuf_client = client; - guc_sample_forcewake(guc, client); + intel_guc_sample_forcewake(guc, client); guc_init_doorbell_hw(guc); /* Take over from manual control of ELSP (execlists) */ @@ -1595,7 +1484,7 @@ int intel_guc_suspend(struct drm_device *dev) /* first page is shared data with GuC */ data[2] = i915_ggtt_offset(ctx->engine[RCS].state); - return guc_send(guc, data, ARRAY_SIZE(data)); + return intel_guc_send(guc, data, ARRAY_SIZE(data)); } @@ -1623,7 +1512,7 @@ int intel_guc_resume(struct drm_device *dev) /* first page is shared data with GuC */ data[2] = i915_ggtt_offset(ctx->engine[RCS].state); - return guc_send(guc, data, ARRAY_SIZE(data)); + return intel_guc_send(guc, data, ARRAY_SIZE(data)); } void i915_guc_capture_logs(struct drm_i915_private *dev_priv) @@ -1634,7 +1523,7 @@ void i915_guc_capture_logs(struct drm_i915_private *dev_priv) * time, so get/put should be really quick. */ intel_runtime_pm_get(dev_priv); - guc_logbuffer_flush_complete(&dev_priv->guc); + intel_guc_logbuffer_flush_complete(&dev_priv->guc); intel_runtime_pm_put(dev_priv); } @@ -1652,7 +1541,7 @@ void i915_guc_flush_logs(struct drm_i915_private *dev_priv) flush_work(&dev_priv->guc.log.flush_work); /* Ask GuC to update the log buffer state */ - guc_force_logbuffer_flush(&dev_priv->guc); + intel_guc_force_logbuffer_flush(&dev_priv->guc); /* GuC would have updated log buffer by now, so capture it */ i915_guc_capture_logs(dev_priv); @@ -1693,7 +1582,7 @@ int i915_guc_log_control(struct drm_i915_private *dev_priv, u64 control_val) if (!log_param.logging_enabled && (i915.guc_log_level < 0)) return 0; - ret = guc_logging_control(&dev_priv->guc, log_param.value); + ret = intel_guc_logging_control(&dev_priv->guc, log_param.value); if (ret < 0) { DRM_DEBUG_DRIVER("guc_logging_control action failed %d\n", ret); return ret; diff --git a/drivers/gpu/drm/i915/intel_uc.c b/drivers/gpu/drm/i915/intel_uc.c new file mode 100644 index 0000000..497c9c3 --- /dev/null +++ b/drivers/gpu/drm/i915/intel_uc.c @@ -0,0 +1,138 @@ +/* + * Copyright © 2016 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + * + */ + + +#include "i915_drv.h" +#include "intel_uc.h" + +/* + * Read GuC command/status register (SOFT_SCRATCH_0) + * Return true if it contains a response rather than a command + */ +bool intel_guc_recv(struct drm_i915_private *dev_priv, u32 *status) +{ + u32 val = I915_READ(SOFT_SCRATCH(0)); + *status = val; + return INTEL_GUC_RECV_IS_RESPONSE(val); +} + +int intel_guc_send(struct intel_guc *guc, u32 *data, u32 len) +{ + struct drm_i915_private *dev_priv = guc_to_i915(guc); + u32 status; + int i; + int ret; + + if (WARN_ON(len < 1 || len > 15)) + return -EINVAL; + + mutex_lock(&guc->send_mutex); + intel_uncore_forcewake_get(dev_priv, FORCEWAKE_ALL); + + dev_priv->guc.action_count += 1; + dev_priv->guc.action_cmd = data[0]; + + for (i = 0; i < len; i++) + I915_WRITE(SOFT_SCRATCH(i), data[i]); + + POSTING_READ(SOFT_SCRATCH(i - 1)); + + I915_WRITE(GUC_SEND_INTERRUPT, GUC_SEND_TRIGGER); + + /* + * Fast commands should complete in less than 10us, so sample quickly + * up to that length of time, then switch to a slower sleep-wait loop. + * No inte_guc_send command should ever take longer than 10ms. + */ + ret = wait_for_us(intel_guc_recv(dev_priv, &status), 10); + if (ret) + ret = wait_for(intel_guc_recv(dev_priv, &status), 10); + if (status != INTEL_GUC_RECV_STATUS_SUCCESS) { + /* + * Either the GuC explicitly returned an error (which + * we convert to -EIO here) or no response at all was + * received within the timeout limit (-ETIMEDOUT) + */ + if (ret != -ETIMEDOUT) + ret = -EIO; + + DRM_WARN("Action 0x%X failed; ret=%d status=0x%08X response=0x%08X\n", + data[0], ret, status, I915_READ(SOFT_SCRATCH(15))); + + dev_priv->guc.action_fail += 1; + dev_priv->guc.action_err = ret; + } + dev_priv->guc.action_status = status; + + intel_uncore_forcewake_put(dev_priv, FORCEWAKE_ALL); + mutex_unlock(&guc->send_mutex); + + return ret; +} + +int intel_guc_sample_forcewake(struct intel_guc *guc, + struct i915_guc_client *client) +{ + struct drm_i915_private *dev_priv = guc_to_i915(guc); + u32 data[2]; + + data[0] = INTEL_GUC_ACTION_SAMPLE_FORCEWAKE; + /* WaRsDisableCoarsePowerGating:skl,bxt */ + if (!intel_enable_rc6() || NEEDS_WaRsDisableCoarsePowerGating(dev_priv)) + data[1] = 0; + else + /* bit 0 and 1 are for Render and Media domain separately */ + data[1] = GUC_FORCEWAKE_RENDER | GUC_FORCEWAKE_MEDIA; + + return intel_guc_send(guc, data, ARRAY_SIZE(data)); +} + +int intel_guc_logbuffer_flush_complete(struct intel_guc *guc) +{ + u32 data[1]; + + data[0] = INTEL_GUC_ACTION_LOG_BUFFER_FILE_FLUSH_COMPLETE; + + return intel_guc_send(guc, data, 1); +} + +int intel_guc_force_logbuffer_flush(struct intel_guc *guc) +{ + u32 data[2]; + + data[0] = INTEL_GUC_ACTION_FORCE_LOG_BUFFER_FLUSH; + data[1] = 0; + + return intel_guc_send(guc, data, 2); +} + +int intel_guc_logging_control(struct intel_guc *guc, u32 control_val) +{ + u32 data[2]; + + data[0] = INTEL_GUC_ACTION_UK_LOG_ENABLE_LOGGING; + data[1] = control_val; + + return intel_guc_send(guc, data, 2); +} diff --git a/drivers/gpu/drm/i915/intel_uc.h b/drivers/gpu/drm/i915/intel_uc.h index 4b4a91e..0a55e5a 100644 --- a/drivers/gpu/drm/i915/intel_uc.h +++ b/drivers/gpu/drm/i915/intel_uc.h @@ -168,6 +168,15 @@ struct intel_guc { struct mutex send_mutex; }; +/* intel_uc.c */ +bool intel_guc_recv(struct drm_i915_private *dev_priv, u32 *status); +int intel_guc_send(struct intel_guc *guc, u32 *data, u32 len); +int intel_guc_sample_forcewake(struct intel_guc *guc, + struct i915_guc_client *client); +int intel_guc_logbuffer_flush_complete(struct intel_guc *guc); +int intel_guc_force_logbuffer_flush(struct intel_guc *guc); +int intel_guc_logging_control(struct intel_guc *guc, u32 control_val); + /* intel_guc_loader.c */ extern void intel_guc_init(struct drm_device *dev); extern int intel_guc_setup(struct drm_device *dev);