From patchwork Fri Dec 30 07:09:34 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dhinakaran Pandiyan X-Patchwork-Id: 9491859 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 334D860838 for ; Fri, 30 Dec 2016 07:11:12 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 217D91FF15 for ; Fri, 30 Dec 2016 07:11:12 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 16275200F5; Fri, 30 Dec 2016 07:11:12 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.2 required=2.0 tests=BAYES_00, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 9287C1FF15 for ; Fri, 30 Dec 2016 07:11:11 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id AE18E6E1E1; Fri, 30 Dec 2016 07:11:08 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga14.intel.com (mga14.intel.com [192.55.52.115]) by gabe.freedesktop.org (Postfix) with ESMTPS id A50796E1E4 for ; Fri, 30 Dec 2016 07:10:56 +0000 (UTC) Received: from orsmga001.jf.intel.com ([10.7.209.18]) by fmsmga103.fm.intel.com with ESMTP; 29 Dec 2016 23:10:55 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos; i="5.33,428,1477983600"; d="scan'208"; a="1077561379" Received: from nuc-skylake.jf.intel.com ([10.54.75.136]) by orsmga001.jf.intel.com with ESMTP; 29 Dec 2016 23:10:55 -0800 From: Dhinakaran Pandiyan To: intel-gfx@lists.freedesktop.org Date: Thu, 29 Dec 2016 23:09:34 -0800 Message-Id: <1483081776-5605-5-git-send-email-dhinakaran.pandiyan@intel.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1483081776-5605-1-git-send-email-dhinakaran.pandiyan@intel.com> References: <1483081776-5605-1-git-send-email-dhinakaran.pandiyan@intel.com> Cc: Daniel Vetter , Dhinakaran Pandiyan Subject: [Intel-gfx] [PATCH 4/6] drm/dp: Introduce DP MST topology manager state to track DP link bw X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Virus-Scanned: ClamAV using ClamSMTP Link bandwidth is shared between multiple display streams in DP MST configurations. The DP MST topology manager structure maintains the shared link bandwidth for a primary link directly connected to the GPU. For atomic modesetting drivers, checking if there is sufficient link bandwidth for a mode needs to be done during the atomic_check phase to avoid failed modesets. Let's encsapsulate the available link bw information in a state structure so that bw can be allocated and released atomically for each of the ports sharing the primary link. Signed-off-by: Dhinakaran Pandiyan --- drivers/gpu/drm/drm_atomic.c | 66 +++++++++++++++++++++++++++++++++++ drivers/gpu/drm/drm_atomic_helper.c | 10 ++++++ drivers/gpu/drm/drm_dp_mst_topology.c | 10 ++++++ include/drm/drm_atomic.h | 11 ++++++ include/drm/drm_dp_mst_helper.h | 13 +++++++ 5 files changed, 110 insertions(+) diff --git a/drivers/gpu/drm/drm_atomic.c b/drivers/gpu/drm/drm_atomic.c index b1b5401..5f2fc96 100644 --- a/drivers/gpu/drm/drm_atomic.c +++ b/drivers/gpu/drm/drm_atomic.c @@ -31,6 +31,7 @@ #include #include #include +#include #include #include "drm_crtc_internal.h" @@ -62,6 +63,7 @@ void drm_atomic_state_default_release(struct drm_atomic_state *state) kfree(state->connectors); kfree(state->crtcs); kfree(state->planes); + kfree(state->dp_mst_topologies); } EXPORT_SYMBOL(drm_atomic_state_default_release); @@ -189,6 +191,18 @@ void drm_atomic_state_default_clear(struct drm_atomic_state *state) state->planes[i].ptr = NULL; state->planes[i].state = NULL; } + + for (i = 0; i < state->num_mst_topologies; i++) { + struct drm_dp_mst_topology_mgr *mgr = state->dp_mst_topologies[i].ptr; + + if (!mgr) + continue; + + kfree(state->dp_mst_topologies[i].state); + state->dp_mst_topologies[i].ptr = NULL; + state->dp_mst_topologies[i].state = NULL; + } + } EXPORT_SYMBOL(drm_atomic_state_default_clear); @@ -981,6 +995,58 @@ static void drm_atomic_plane_print_state(struct drm_printer *p, plane->funcs->atomic_print_state(p, state); } +struct drm_dp_mst_topology_state *drm_atomic_get_mst_topology_state(struct drm_atomic_state *state, + struct drm_dp_mst_topology_mgr *mgr) +{ + + int ret, i; + size_t new_size; + struct __drm_dp_mst_topology_state *new_arr; + struct drm_dp_mst_topology_state *new_mst_state; + int num_topologies; + struct drm_mode_config *config = &mgr->dev->mode_config; + + WARN_ON(!state->acquire_ctx); + + ret = drm_modeset_lock(&config->connection_mutex, state->acquire_ctx); + if (ret) + return ERR_PTR(ret); + + for (i = 0; i < state->num_mst_topologies; i++) { + if (mgr == state->dp_mst_topologies[i].ptr && + state->dp_mst_topologies[i].state) { + return state->dp_mst_topologies[i].state; + } + } + + num_topologies = state->num_mst_topologies + 1; + new_size = sizeof(*state->dp_mst_topologies) * num_topologies; + new_arr = krealloc(state->dp_mst_topologies, new_size, GFP_KERNEL); + if (!new_arr) + return ERR_PTR(-ENOMEM); + + state->dp_mst_topologies = new_arr; + memset(&state->dp_mst_topologies[state->num_mst_topologies], 0, + sizeof(*state->dp_mst_topologies)); + + new_mst_state = kmalloc(sizeof(*mgr->state), GFP_KERNEL); + if (!new_mst_state) + return ERR_PTR(-ENOMEM); + + new_mst_state->avail_slots = mgr->state->avail_slots; + state->dp_mst_topologies[state->num_mst_topologies].state = new_mst_state; + state->dp_mst_topologies[state->num_mst_topologies].ptr = mgr; + state->num_mst_topologies = num_topologies; + new_mst_state->mgr = mgr; + mgr->state->state = state; + + DRM_DEBUG_ATOMIC("Added [MST Topology w/ base connector:%d] %p state to %p\n", + mgr->conn_base_id, new_mst_state, state); + + return new_mst_state; +} +EXPORT_SYMBOL(drm_atomic_get_mst_topology_state); + /** * drm_atomic_get_connector_state - get connector state * @state: global atomic state object diff --git a/drivers/gpu/drm/drm_atomic_helper.c b/drivers/gpu/drm/drm_atomic_helper.c index 799c156..0c0e497 100644 --- a/drivers/gpu/drm/drm_atomic_helper.c +++ b/drivers/gpu/drm/drm_atomic_helper.c @@ -30,6 +30,7 @@ #include #include #include +#include #include #include "drm_crtc_internal.h" @@ -1992,6 +1993,15 @@ void drm_atomic_helper_swap_state(struct drm_atomic_state *state, connector->state->state = NULL; } + for (i = 0; i < state->num_mst_topologies; i++) { + struct drm_dp_mst_topology_mgr *mgr; + + mgr = state->dp_mst_topologies[i].ptr; + mgr->state->state = state; + swap(state->dp_mst_topologies[i].state, mgr->state); + mgr->state->state = NULL; + } + for_each_crtc_in_state(state, crtc, crtc_state, i) { crtc->state->state = state; swap(state->crtcs[i].state, crtc->state); diff --git a/drivers/gpu/drm/drm_dp_mst_topology.c b/drivers/gpu/drm/drm_dp_mst_topology.c index d42a6c0..1be19e1 100644 --- a/drivers/gpu/drm/drm_dp_mst_topology.c +++ b/drivers/gpu/drm/drm_dp_mst_topology.c @@ -2042,6 +2042,9 @@ int drm_dp_mst_topology_mgr_set_mst(struct drm_dp_mst_topology_mgr *mgr, bool ms goto out_unlock; } + /* max. time slots - one slot for MTP header */ + mgr->state->avail_slots = 63; + /* add initial branch device at LCT 1 */ mstb = drm_dp_add_mst_branch_device(1, NULL); if (mstb == NULL) { @@ -2973,6 +2976,11 @@ int drm_dp_mst_topology_mgr_init(struct drm_dp_mst_topology_mgr *mgr, mgr->proposed_vcpis = kcalloc(max_payloads, sizeof(struct drm_dp_vcpi *), GFP_KERNEL); if (!mgr->proposed_vcpis) return -ENOMEM; + mgr->state = kzalloc(sizeof(*mgr->state), GFP_KERNEL); + if (!mgr->state) + return -ENOMEM; + mgr->state->mgr = mgr; + set_bit(0, &mgr->payload_mask); if (test_calc_pbn_mode() < 0) DRM_ERROR("MST PBN self-test failed\n"); @@ -2995,6 +3003,8 @@ void drm_dp_mst_topology_mgr_destroy(struct drm_dp_mst_topology_mgr *mgr) kfree(mgr->proposed_vcpis); mgr->proposed_vcpis = NULL; mutex_unlock(&mgr->payload_lock); + kfree(mgr->state); + mgr->state = NULL; mgr->dev = NULL; mgr->aux = NULL; } diff --git a/include/drm/drm_atomic.h b/include/drm/drm_atomic.h index b0ebe0f..cb91b5a 100644 --- a/include/drm/drm_atomic.h +++ b/include/drm/drm_atomic.h @@ -153,6 +153,11 @@ struct __drm_connnectors_state { struct drm_connector_state *state; }; +struct __drm_dp_mst_topology_state { + struct drm_dp_mst_topology_mgr *ptr; + struct drm_dp_mst_topology_state *state; +}; + /** * struct drm_atomic_state - the global state object for atomic updates * @ref: count of all references to this state (will not be freed until zero) @@ -177,6 +182,8 @@ struct drm_atomic_state { struct __drm_crtcs_state *crtcs; int num_connector; struct __drm_connnectors_state *connectors; + int num_mst_topologies; + struct __drm_dp_mst_topology_state *dp_mst_topologies; struct drm_modeset_acquire_ctx *acquire_ctx; @@ -250,6 +257,10 @@ int drm_atomic_connector_set_property(struct drm_connector *connector, struct drm_connector_state *state, struct drm_property *property, uint64_t val); +struct drm_dp_mst_topology_state * __must_check +drm_atomic_get_mst_topology_state(struct drm_atomic_state *state, + struct drm_dp_mst_topology_mgr *mgr); + /** * drm_atomic_get_existing_crtc_state - get crtc state, if it exists * @state: global atomic state object diff --git a/include/drm/drm_dp_mst_helper.h b/include/drm/drm_dp_mst_helper.h index 98d3c73..0a9bf20 100644 --- a/include/drm/drm_dp_mst_helper.h +++ b/include/drm/drm_dp_mst_helper.h @@ -403,6 +403,12 @@ struct drm_dp_payload { int vcpi; }; +struct drm_dp_mst_topology_state { + int avail_slots; + struct drm_atomic_state *state; + struct drm_dp_mst_topology_mgr *mgr; +}; + /** * struct drm_dp_mst_topology_mgr - DisplayPort MST manager * @@ -481,6 +487,11 @@ struct drm_dp_mst_topology_mgr { int pbn_div; /** + * @state: MST topology manager state for atomic modesetting drivers + */ + struct drm_dp_mst_topology_state *state; + + /** * @qlock: protects @tx_msg_downq, the tx_slots in struct * &drm_dp_mst_branch and txmsg->state once they are queued */ @@ -596,4 +607,6 @@ void drm_dp_mst_dump_topology(struct seq_file *m, void drm_dp_mst_topology_mgr_suspend(struct drm_dp_mst_topology_mgr *mgr); int drm_dp_mst_topology_mgr_resume(struct drm_dp_mst_topology_mgr *mgr); +struct drm_dp_mst_topology_state *drm_atomic_get_mst_topology_state(struct drm_atomic_state *state, + struct drm_dp_mst_topology_mgr *mgr); #endif