From patchwork Fri Dec 30 07:09:36 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dhinakaran Pandiyan X-Patchwork-Id: 9491861 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id CD69760838 for ; Fri, 30 Dec 2016 07:11:15 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id BC07E1FF15 for ; Fri, 30 Dec 2016 07:11:15 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id B0DE6200F5; Fri, 30 Dec 2016 07:11:15 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.2 required=2.0 tests=BAYES_00, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 536501FF15 for ; Fri, 30 Dec 2016 07:11:15 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id AEFBF6E1E7; Fri, 30 Dec 2016 07:11:09 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga14.intel.com (mga14.intel.com [192.55.52.115]) by gabe.freedesktop.org (Postfix) with ESMTPS id EE1746E1E4 for ; Fri, 30 Dec 2016 07:10:57 +0000 (UTC) Received: from orsmga001.jf.intel.com ([10.7.209.18]) by fmsmga103.fm.intel.com with ESMTP; 29 Dec 2016 23:10:57 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos; i="5.33,428,1477983600"; d="scan'208"; a="1077561391" Received: from nuc-skylake.jf.intel.com ([10.54.75.136]) by orsmga001.jf.intel.com with ESMTP; 29 Dec 2016 23:10:57 -0800 From: Dhinakaran Pandiyan To: intel-gfx@lists.freedesktop.org Date: Thu, 29 Dec 2016 23:09:36 -0800 Message-Id: <1483081776-5605-7-git-send-email-dhinakaran.pandiyan@intel.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1483081776-5605-1-git-send-email-dhinakaran.pandiyan@intel.com> References: <1483081776-5605-1-git-send-email-dhinakaran.pandiyan@intel.com> Cc: Daniel Vetter , Dhinakaran Pandiyan Subject: [Intel-gfx] [PATCH 6/6] drm/i915/dp: Track available DP MST vcpi time slots X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Virus-Scanned: ClamAV using ClamSMTP Make use of the added MST helpers to find, allocate and release link bw for atomic modesets. Signed-off-by: Dhinakaran Pandiyan --- drivers/gpu/drm/i915/intel_display.c | 39 +++++++++++++++++++++++++++++++++++- drivers/gpu/drm/i915/intel_dp_mst.c | 36 ++++++++++++++++++++++++++++++++- drivers/gpu/drm/i915/intel_drv.h | 3 +++ 3 files changed, 76 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index d8effd4..cefaee7 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -14109,6 +14109,40 @@ static int calc_watermark_data(struct drm_atomic_state *state) return 0; } +static int intel_mst_clear_config(struct drm_atomic_state *state) +{ + struct drm_crtc_state *crtc_state; + struct drm_crtc *crtc; + struct drm_connector *connector; + struct drm_connector_state *connector_state; + int i, j; + + for_each_crtc_in_state(state, crtc, crtc_state, i) { + if (!crtc_state->active_changed || crtc_state->active) + continue; + + for_each_connector_in_state(state, connector, connector_state, j) { + struct intel_encoder *encoder; + struct drm_crtc *curr_crtc; + int slots; + + encoder = to_intel_encoder(connector->state->best_encoder); + if (encoder->type != INTEL_OUTPUT_DP_MST) + continue; + + curr_crtc = connector->state->crtc; + if (curr_crtc && crtc == curr_crtc) { + slots = to_intel_crtc_state(crtc->state)->dp_m_n.tu; + return intel_dp_mst_reset_vcpi(encoder, + connector_state, + slots); + } + } + } + + return 0; +} + /** * intel_atomic_check - validate state object * @dev: drm device @@ -14179,8 +14213,11 @@ static int intel_atomic_check(struct drm_device *dev, } if (any_ms) { - ret = intel_modeset_checks(state); + ret = intel_mst_clear_config(state); + if (ret) + return ret; + ret = intel_modeset_checks(state); if (ret) return ret; } else { diff --git a/drivers/gpu/drm/i915/intel_dp_mst.c b/drivers/gpu/drm/i915/intel_dp_mst.c index 02a1e2c..331909b 100644 --- a/drivers/gpu/drm/i915/intel_dp_mst.c +++ b/drivers/gpu/drm/i915/intel_dp_mst.c @@ -44,6 +44,7 @@ static bool intel_dp_mst_compute_config(struct intel_encoder *encoder, int lane_count, slots; const struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode; int mst_pbn; + struct drm_dp_mst_topology_state *topology_state; pipe_config->has_pch_encoder = false; bpp = 24; @@ -65,7 +66,18 @@ static bool intel_dp_mst_compute_config(struct intel_encoder *encoder, mst_pbn = drm_dp_calc_pbn_mode(adjusted_mode->crtc_clock, bpp); pipe_config->pbn = mst_pbn; - slots = drm_dp_find_vcpi_slots(&intel_dp->mst_mgr, mst_pbn); + + topology_state = drm_atomic_get_mst_topology_state(state, + &intel_dp->mst_mgr); + if (topology_state == NULL) + return false; + + slots = drm_dp_atomic_find_vcpi_slots(topology_state, connector->port, + mst_pbn); + if (slots < 0) { + DRM_DEBUG_KMS("not enough link bw for this mode\n"); + return false; + } intel_link_compute_m_n(bpp, lane_count, adjusted_mode->crtc_clock, @@ -78,6 +90,28 @@ static bool intel_dp_mst_compute_config(struct intel_encoder *encoder, } +int intel_dp_mst_reset_vcpi(struct intel_encoder *encoder, + struct drm_connector_state *conn_state, int slots) +{ + struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base); + struct drm_dp_mst_topology_mgr *mgr = &intel_mst->primary->dp.mst_mgr; + struct drm_dp_mst_topology_state *topology_state; + struct intel_connector *connector = + to_intel_connector(conn_state->connector); + int released; + + topology_state = drm_atomic_get_mst_topology_state(conn_state->state, mgr); + if (IS_ERR(topology_state)) + return PTR_ERR(topology_state); + + released = drm_dp_atomic_release_vcpi_slots(topology_state, connector->port); + + if (WARN_ON(released != slots)) + return -EINVAL; + + return 0; +} + static void intel_mst_disable_dp(struct intel_encoder *encoder, struct intel_crtc_state *old_crtc_state, struct drm_connector_state *old_conn_state) diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h index 025e4c8..2dccbfd 100644 --- a/drivers/gpu/drm/i915/intel_drv.h +++ b/drivers/gpu/drm/i915/intel_drv.h @@ -1487,6 +1487,9 @@ int intel_dp_aux_init_backlight_funcs(struct intel_connector *intel_connector); /* intel_dp_mst.c */ int intel_dp_mst_encoder_init(struct intel_digital_port *intel_dig_port, int conn_id); void intel_dp_mst_encoder_cleanup(struct intel_digital_port *intel_dig_port); +int intel_dp_mst_reset_vcpi(struct intel_encoder *encoder, + struct drm_connector_state *conn_state, + int slots); /* intel_dsi.c */ void intel_dsi_init(struct drm_i915_private *dev_priv);