diff mbox

[GLK,MIPI,DSI,V5,4/8] drm/i915: Set the Z inversion overlap field

Message ID 1487078180-15147-5-git-send-email-madhav.chauhan@intel.com (mailing list archive)
State New, archived
Headers show

Commit Message

Chauhan, Madhav Feb. 14, 2017, 1:16 p.m. UTC 
From: Deepak M <m.deepak@intel.com>

Dual link Z-inversion overlap field is present
in MIPI_CTRL register unlike the older platforms,
hence setting the same in this patch.

Signed-off-by: Deepak M <m.deepak@intel.com>
Signed-off-by: Madhav Chauhan <madhav.chauhan@intel.com>
---
 drivers/gpu/drm/i915/intel_dsi.c | 17 +++++++++++++----
 1 file changed, 13 insertions(+), 4 deletions(-)

Comments

Jani Nikula Feb. 16, 2017, 3:18 p.m. UTC | #1 
On Tue, 14 Feb 2017, Madhav Chauhan <madhav.chauhan@intel.com> wrote:
> From: Deepak M <m.deepak@intel.com>
>
> Dual link Z-inversion overlap field is present
> in MIPI_CTRL register unlike the older platforms,
> hence setting the same in this patch.
>
> Signed-off-by: Deepak M <m.deepak@intel.com>
> Signed-off-by: Madhav Chauhan <madhav.chauhan@intel.com>

Pushed this one patch to dinq. This one is really bxt specific, and
should have been first in the series.

BR,
Jani.

> ---
>  drivers/gpu/drm/i915/intel_dsi.c | 17 +++++++++++++----
>  1 file changed, 13 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_dsi.c b/drivers/gpu/drm/i915/intel_dsi.c
> index a72a10f..ef643c1 100644
> --- a/drivers/gpu/drm/i915/intel_dsi.c
> +++ b/drivers/gpu/drm/i915/intel_dsi.c
> @@ -561,12 +561,21 @@ static void intel_dsi_port_enable(struct intel_encoder *encoder)
>  
>  	if (intel_dsi->dual_link == DSI_DUAL_LINK_FRONT_BACK) {
>  		u32 temp;
> -
> -		temp = I915_READ(VLV_CHICKEN_3);
> -		temp &= ~PIXEL_OVERLAP_CNT_MASK |
> +		if (IS_GEN9_LP(dev_priv)) {
> +			for_each_dsi_port(port, intel_dsi->ports) {
> +				temp = I915_READ(MIPI_CTRL(port));
> +				temp &= ~BXT_PIXEL_OVERLAP_CNT_MASK |
> +					intel_dsi->pixel_overlap <<
> +					BXT_PIXEL_OVERLAP_CNT_SHIFT;
> +				I915_WRITE(MIPI_CTRL(port), temp);
> +			}
> +		} else {
> +			temp = I915_READ(VLV_CHICKEN_3);
> +			temp &= ~PIXEL_OVERLAP_CNT_MASK |
>  					intel_dsi->pixel_overlap <<
>  					PIXEL_OVERLAP_CNT_SHIFT;
> -		I915_WRITE(VLV_CHICKEN_3, temp);
> +			I915_WRITE(VLV_CHICKEN_3, temp);
> +		}
>  	}
>  
>  	for_each_dsi_port(port, intel_dsi->ports) {
diff mbox

Patch

diff --git a/drivers/gpu/drm/i915/intel_dsi.c b/drivers/gpu/drm/i915/intel_dsi.c
index a72a10f..ef643c1 100644
--- a/drivers/gpu/drm/i915/intel_dsi.c
+++ b/drivers/gpu/drm/i915/intel_dsi.c
@@ -561,12 +561,21 @@  static void intel_dsi_port_enable(struct intel_encoder *encoder)
 
 	if (intel_dsi->dual_link == DSI_DUAL_LINK_FRONT_BACK) {
 		u32 temp;
-
-		temp = I915_READ(VLV_CHICKEN_3);
-		temp &= ~PIXEL_OVERLAP_CNT_MASK |
+		if (IS_GEN9_LP(dev_priv)) {
+			for_each_dsi_port(port, intel_dsi->ports) {
+				temp = I915_READ(MIPI_CTRL(port));
+				temp &= ~BXT_PIXEL_OVERLAP_CNT_MASK |
+					intel_dsi->pixel_overlap <<
+					BXT_PIXEL_OVERLAP_CNT_SHIFT;
+				I915_WRITE(MIPI_CTRL(port), temp);
+			}
+		} else {
+			temp = I915_READ(VLV_CHICKEN_3);
+			temp &= ~PIXEL_OVERLAP_CNT_MASK |
 					intel_dsi->pixel_overlap <<
 					PIXEL_OVERLAP_CNT_SHIFT;
-		I915_WRITE(VLV_CHICKEN_3, temp);
+			I915_WRITE(VLV_CHICKEN_3, temp);
+		}
 	}
 
 	for_each_dsi_port(port, intel_dsi->ports) {