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[10/67] drm/i915/cnl: Add Cannonlake PCI IDs for Y-skus.

Message ID 1491506163-14587-10-git-send-email-rodrigo.vivi@intel.com (mailing list archive)
State New, archived
Headers show

Commit Message

Rodrigo Vivi April 6, 2017, 7:15 p.m. UTC 
By the Spec all CNL Y skus are 2+2, i.e. GT2.

v2: Really include the PCI IDs to the picidlist[];

Reviewed-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
---
 include/drm/i915_pciids.h | 12 +++++++++++-
 1 file changed, 11 insertions(+), 1 deletion(-)
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Patch

diff --git a/include/drm/i915_pciids.h b/include/drm/i915_pciids.h
index 7f1bb3b..7d2696a 100644
--- a/include/drm/i915_pciids.h
+++ b/include/drm/i915_pciids.h
@@ -341,7 +341,17 @@ 
 	INTEL_VGA_DEVICE(0x5A42, info), \
 	INTEL_VGA_DEVICE(0x5A4A, info)
 
+/* CNL Y 2+2 */
+#define INTEL_CNL_Y_GT2_IDS(info) \
+	INTEL_VGA_DEVICE(0x5A51, info), \
+	INTEL_VGA_DEVICE(0x5A59, info), \
+	INTEL_VGA_DEVICE(0x5A41, info), \
+	INTEL_VGA_DEVICE(0x5A49, info), \
+	INTEL_VGA_DEVICE(0x5A71, info), \
+	INTEL_VGA_DEVICE(0x5A79, info)
+
 #define INTEL_CNL_IDS(info) \
-	INTEL_CNL_U_GT2_IDS(info)
+	INTEL_CNL_U_GT2_IDS(info), \
+	INTEL_CNL_Y_GT2_IDS(info)
 
 #endif /* _I915_PCIIDS_H */