diff mbox

[42/67] drm/i915/DMC/CNL: Load DMC on CNL

Message ID 1491506163-14587-42-git-send-email-rodrigo.vivi@intel.com (mailing list archive)
State New, archived
Headers show

Commit Message

Rodrigo Vivi April 6, 2017, 7:15 p.m. UTC
From: Anusha Srivatsa <anusha.srivatsa@intel.com>

This patch loads the DMC on CNL.The firmware version
is 1.04.

v2: (Rodrigo) Remove MODULE_FIRMWARE.

Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
---
 drivers/gpu/drm/i915/i915_pci.c  |  1 +
 drivers/gpu/drm/i915/intel_csr.c | 11 +++++++++--
 2 files changed, 10 insertions(+), 2 deletions(-)

Comments

Animesh Manna May 22, 2017, 10:43 a.m. UTC | #1
On 4/7/2017 12:45 AM, Rodrigo Vivi wrote:
> From: Anusha Srivatsa <anusha.srivatsa@intel.com>
>
> This patch loads the DMC on CNL.The firmware version
> is 1.04.
>
> v2: (Rodrigo) Remove MODULE_FIRMWARE.
>
> Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
> Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
> ---
>   drivers/gpu/drm/i915/i915_pci.c  |  1 +
>   drivers/gpu/drm/i915/intel_csr.c | 11 +++++++++--
>   2 files changed, 10 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
> index c84ef7c..bace848 100644
> --- a/drivers/gpu/drm/i915/i915_pci.c
> +++ b/drivers/gpu/drm/i915/i915_pci.c
> @@ -437,6 +437,7 @@
>   	.platform = INTEL_CANNONLAKE,
>   	.gen = 10,
>   	.ddb_size = 1024,
> +	.has_csr = 1,
>   };
>   
>   /*
> diff --git a/drivers/gpu/drm/i915/intel_csr.c b/drivers/gpu/drm/i915/intel_csr.c
> index 1575bde..496a965 100644
> --- a/drivers/gpu/drm/i915/intel_csr.c
> +++ b/drivers/gpu/drm/i915/intel_csr.c
> @@ -37,6 +37,9 @@
>   #define I915_CSR_GLK "i915/glk_dmc_ver1_04.bin"
>   #define GLK_CSR_VERSION_REQUIRED	CSR_VERSION(1, 4)
>   
> +#define I915_CSR_CNL "i915/cnl_dmc_ver1_04.bin"
> +#define CNL_CSR_VERSION_REQUIRED	CSR_VERSION(1, 4)
> +
>   #define I915_CSR_KBL "i915/kbl_dmc_ver1_01.bin"
>   MODULE_FIRMWARE(I915_CSR_KBL);
>   #define KBL_CSR_VERSION_REQUIRED	CSR_VERSION(1, 1)
> @@ -289,7 +292,9 @@ static uint32_t *parse_csr_fw(struct drm_i915_private *dev_priv,
>   
>   	csr->version = css_header->version;
>   
> -	if (IS_GEMINILAKE(dev_priv)) {
> +	if (IS_CANNONLAKE(dev_priv)) {
> +		required_version = CNL_CSR_VERSION_REQUIRED;
> +	} else if (IS_GEMINILAKE(dev_priv)) {
>   		required_version = GLK_CSR_VERSION_REQUIRED;
>   	} else if (IS_KABYLAKE(dev_priv)) {
>   		required_version = KBL_CSR_VERSION_REQUIRED;
> @@ -438,7 +443,9 @@ void intel_csr_ucode_init(struct drm_i915_private *dev_priv)
>   	if (!HAS_CSR(dev_priv))
>   		return;
>   
> -	if (IS_GEMINILAKE(dev_priv))
> +	if (IS_CANNONLAKE(dev_priv))
> +		csr->fw_path = I915_CSR_CNL;
> +	else if (IS_GEMINILAKE(dev_priv))
>   		csr->fw_path = I915_CSR_GLK;
>   	else if (IS_KABYLAKE(dev_priv))
>   		csr->fw_path = I915_CSR_KBL;

Changes looks good to me.

Reviewed-by: Animesh Manna <animesh.manna@intel.com>

Regards,

Animesh
diff mbox

Patch

diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
index c84ef7c..bace848 100644
--- a/drivers/gpu/drm/i915/i915_pci.c
+++ b/drivers/gpu/drm/i915/i915_pci.c
@@ -437,6 +437,7 @@ 
 	.platform = INTEL_CANNONLAKE,
 	.gen = 10,
 	.ddb_size = 1024,
+	.has_csr = 1,
 };
 
 /*
diff --git a/drivers/gpu/drm/i915/intel_csr.c b/drivers/gpu/drm/i915/intel_csr.c
index 1575bde..496a965 100644
--- a/drivers/gpu/drm/i915/intel_csr.c
+++ b/drivers/gpu/drm/i915/intel_csr.c
@@ -37,6 +37,9 @@ 
 #define I915_CSR_GLK "i915/glk_dmc_ver1_04.bin"
 #define GLK_CSR_VERSION_REQUIRED	CSR_VERSION(1, 4)
 
+#define I915_CSR_CNL "i915/cnl_dmc_ver1_04.bin"
+#define CNL_CSR_VERSION_REQUIRED	CSR_VERSION(1, 4)
+
 #define I915_CSR_KBL "i915/kbl_dmc_ver1_01.bin"
 MODULE_FIRMWARE(I915_CSR_KBL);
 #define KBL_CSR_VERSION_REQUIRED	CSR_VERSION(1, 1)
@@ -289,7 +292,9 @@  static uint32_t *parse_csr_fw(struct drm_i915_private *dev_priv,
 
 	csr->version = css_header->version;
 
-	if (IS_GEMINILAKE(dev_priv)) {
+	if (IS_CANNONLAKE(dev_priv)) {
+		required_version = CNL_CSR_VERSION_REQUIRED;
+	} else if (IS_GEMINILAKE(dev_priv)) {
 		required_version = GLK_CSR_VERSION_REQUIRED;
 	} else if (IS_KABYLAKE(dev_priv)) {
 		required_version = KBL_CSR_VERSION_REQUIRED;
@@ -438,7 +443,9 @@  void intel_csr_ucode_init(struct drm_i915_private *dev_priv)
 	if (!HAS_CSR(dev_priv))
 		return;
 
-	if (IS_GEMINILAKE(dev_priv))
+	if (IS_CANNONLAKE(dev_priv))
+		csr->fw_path = I915_CSR_CNL;
+	else if (IS_GEMINILAKE(dev_priv))
 		csr->fw_path = I915_CSR_GLK;
 	else if (IS_KABYLAKE(dev_priv))
 		csr->fw_path = I915_CSR_KBL;