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[64/67] drm/i915/cnl: WaThrottleEUPerfToAvoidTDBackPressure:cnl(pre-prod)

Message ID 1491506163-14587-64-git-send-email-rodrigo.vivi@intel.com (mailing list archive)
State New, archived
Headers show

Commit Message

Rodrigo Vivi April 6, 2017, 7:16 p.m. UTC
Wa for B-stepping only.

A for a hang issue that requires throttling EU performace
to 12.5% to avoid back pressure to thread dispatch

Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
---
 drivers/gpu/drm/i915/i915_reg.h        | 1 +
 drivers/gpu/drm/i915/intel_engine_cs.c | 4 ++++
 2 files changed, 5 insertions(+)

Comments

oscar.mateo@intel.com Sept. 6, 2017, 9:55 p.m. UTC | #1
On 04/06/2017 12:16 PM, Rodrigo Vivi wrote:
> Wa for B-stepping only.
>
> A for a hang issue that requires throttling EU performace
> to 12.5% to avoid back pressure to thread dispatch
>
> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
> ---
>   drivers/gpu/drm/i915/i915_reg.h        | 1 +
>   drivers/gpu/drm/i915/intel_engine_cs.c | 4 ++++
>   2 files changed, 5 insertions(+)

Reviewed-by: Oscar Mateo <oscar.mateo@intel.com>

> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index 67f306e..8b25119 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -7839,6 +7839,7 @@ enum {
>   #define   FLOW_CONTROL_ENABLE		(1<<15)
>   #define   PARTIAL_INSTRUCTION_SHOOTDOWN_DISABLE	(1<<8)
>   #define   STALL_DOP_GATING_DISABLE		(1<<5)
> +#define   THROTTLE_12_5				(7<<2)
>   
>   #define GEN7_ROW_CHICKEN2		_MMIO(0xe4f4)
>   #define GEN7_ROW_CHICKEN2_GT2		_MMIO(0xf4f4)
> diff --git a/drivers/gpu/drm/i915/intel_engine_cs.c b/drivers/gpu/drm/i915/intel_engine_cs.c
> index b5599fa..754b370 100644
> --- a/drivers/gpu/drm/i915/intel_engine_cs.c
> +++ b/drivers/gpu/drm/i915/intel_engine_cs.c
> @@ -951,6 +951,10 @@ static int cnl_init_workarounds(struct intel_engine_cs *engine)
>   	struct drm_i915_private *dev_priv = engine->i915;
>   	int ret;
>   
> +	/* WaThrottleEUPerfToAvoidTDBackPressure:cnl(pre-prod) */
> +	if (IS_CNL_REVID(dev_priv, CNL_REVID_B0, CNL_REVID_B0))
> +		WA_SET_BIT_MASKED(GEN8_ROW_CHICKEN, THROTTLE_12_5);
> +
>   	/* WaDisableReplayBufferBankArbitrationOptimization:cnl */
>   	WA_SET_BIT_MASKED(COMMON_SLICE_CHICKEN2,
>   			  GEN8_SBE_DISABLE_REPLAY_BUF_OPTIMIZATION);
diff mbox

Patch

diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 67f306e..8b25119 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -7839,6 +7839,7 @@  enum {
 #define   FLOW_CONTROL_ENABLE		(1<<15)
 #define   PARTIAL_INSTRUCTION_SHOOTDOWN_DISABLE	(1<<8)
 #define   STALL_DOP_GATING_DISABLE		(1<<5)
+#define   THROTTLE_12_5				(7<<2)
 
 #define GEN7_ROW_CHICKEN2		_MMIO(0xe4f4)
 #define GEN7_ROW_CHICKEN2_GT2		_MMIO(0xf4f4)
diff --git a/drivers/gpu/drm/i915/intel_engine_cs.c b/drivers/gpu/drm/i915/intel_engine_cs.c
index b5599fa..754b370 100644
--- a/drivers/gpu/drm/i915/intel_engine_cs.c
+++ b/drivers/gpu/drm/i915/intel_engine_cs.c
@@ -951,6 +951,10 @@  static int cnl_init_workarounds(struct intel_engine_cs *engine)
 	struct drm_i915_private *dev_priv = engine->i915;
 	int ret;
 
+	/* WaThrottleEUPerfToAvoidTDBackPressure:cnl(pre-prod) */
+	if (IS_CNL_REVID(dev_priv, CNL_REVID_B0, CNL_REVID_B0))
+		WA_SET_BIT_MASKED(GEN8_ROW_CHICKEN, THROTTLE_12_5);
+
 	/* WaDisableReplayBufferBankArbitrationOptimization:cnl */
 	WA_SET_BIT_MASKED(COMMON_SLICE_CHICKEN2,
 			  GEN8_SBE_DISABLE_REPLAY_BUF_OPTIMIZATION);