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[09/67] drm/i915/cnl: Add Cannonlake PCI IDs for U-skus.

Message ID 1491506163-14587-9-git-send-email-rodrigo.vivi@intel.com (mailing list archive)
State New, archived
Headers show

Commit Message

Rodrigo Vivi April 6, 2017, 7:15 p.m. UTC 
Platform enabling and its power-on are organized in different
skus (U x Y x S x H, etc). So instead of organizing it in
GT1 x GT2 x GT3 let's also use the platform sku.

This is also the new Spec style what makes the review much
more easy and straightforward.

v2: Really include the PCI IDs to the picidlist[];
v3: Remove PCI IDs not present in spec.
v4: Rebase.

Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
---
 drivers/gpu/drm/i915/i915_pci.c |  1 +
 include/drm/i915_pciids.h       | 10 ++++++++++
 2 files changed, 11 insertions(+)

Comments

Taylor, Clinton A June 2, 2017, 4:07 p.m. UTC | #1 
On 04/06/2017 12:15 PM, Rodrigo Vivi wrote:
> Platform enabling and its power-on are organized in different
> skus (U x Y x S x H, etc). So instead of organizing it in
> GT1 x GT2 x GT3 let's also use the platform sku.
>
> This is also the new Spec style what makes the review much
> more easy and straightforward.
>
> v2: Really include the PCI IDs to the picidlist[];
> v3: Remove PCI IDs not present in spec.
> v4: Rebase.
Matches latest version of the available U SKU ID's

Reviewed-by: Clinton Taylor <clinton.a.taylor@intel.com>

> Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
> ---
>   drivers/gpu/drm/i915/i915_pci.c |  1 +
>   include/drm/i915_pciids.h       | 10 ++++++++++
>   2 files changed, 11 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
> index a2a4b2f..cb01822 100644
> --- a/drivers/gpu/drm/i915/i915_pci.c
> +++ b/drivers/gpu/drm/i915/i915_pci.c
> @@ -483,6 +483,7 @@
>   	INTEL_KBL_GT2_IDS(&intel_kabylake_info),
>   	INTEL_KBL_GT3_IDS(&intel_kabylake_gt3_info),
>   	INTEL_KBL_GT4_IDS(&intel_kabylake_gt3_info),
> +	INTEL_CNL_IDS(&intel_cannonlake_info),
>   	{0, 0, 0}
>   };
>   MODULE_DEVICE_TABLE(pci, pciidlist);
> diff --git a/include/drm/i915_pciids.h b/include/drm/i915_pciids.h
> index 27e0dba..7f1bb3b 100644
> --- a/include/drm/i915_pciids.h
> +++ b/include/drm/i915_pciids.h
> @@ -334,4 +334,14 @@
>   	INTEL_KBL_GT3_IDS(info), \
>   	INTEL_KBL_GT4_IDS(info)
>   
> +/* CNL U 2+2 */
> +#define INTEL_CNL_U_GT2_IDS(info) \
> +	INTEL_VGA_DEVICE(0x5A52, info), \
> +	INTEL_VGA_DEVICE(0x5A5A, info), \
> +	INTEL_VGA_DEVICE(0x5A42, info), \
> +	INTEL_VGA_DEVICE(0x5A4A, info)
> +
> +#define INTEL_CNL_IDS(info) \
> +	INTEL_CNL_U_GT2_IDS(info)
> +
>   #endif /* _I915_PCIIDS_H */
diff mbox

Patch

diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
index a2a4b2f..cb01822 100644
--- a/drivers/gpu/drm/i915/i915_pci.c
+++ b/drivers/gpu/drm/i915/i915_pci.c
@@ -483,6 +483,7 @@ 
 	INTEL_KBL_GT2_IDS(&intel_kabylake_info),
 	INTEL_KBL_GT3_IDS(&intel_kabylake_gt3_info),
 	INTEL_KBL_GT4_IDS(&intel_kabylake_gt3_info),
+	INTEL_CNL_IDS(&intel_cannonlake_info),
 	{0, 0, 0}
 };
 MODULE_DEVICE_TABLE(pci, pciidlist);
diff --git a/include/drm/i915_pciids.h b/include/drm/i915_pciids.h
index 27e0dba..7f1bb3b 100644
--- a/include/drm/i915_pciids.h
+++ b/include/drm/i915_pciids.h
@@ -334,4 +334,14 @@ 
 	INTEL_KBL_GT3_IDS(info), \
 	INTEL_KBL_GT4_IDS(info)
 
+/* CNL U 2+2 */
+#define INTEL_CNL_U_GT2_IDS(info) \
+	INTEL_VGA_DEVICE(0x5A52, info), \
+	INTEL_VGA_DEVICE(0x5A5A, info), \
+	INTEL_VGA_DEVICE(0x5A42, info), \
+	INTEL_VGA_DEVICE(0x5A4A, info)
+
+#define INTEL_CNL_IDS(info) \
+	INTEL_CNL_U_GT2_IDS(info)
+
 #endif /* _I915_PCIIDS_H */