From patchwork Fri Jun 2 00:51:27 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Navare, Manasi" X-Patchwork-Id: 9761385 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 5214A6038E for ; Fri, 2 Jun 2017 00:46:12 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 55704284BD for ; Fri, 2 Jun 2017 00:46:12 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 4A6582852E; Fri, 2 Jun 2017 00:46:12 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.2 required=2.0 tests=BAYES_00, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 08F9A284BD for ; Fri, 2 Jun 2017 00:46:11 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 3ABF96E4A2; Fri, 2 Jun 2017 00:46:08 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga04.intel.com (mga04.intel.com [192.55.52.120]) by gabe.freedesktop.org (Postfix) with ESMTPS id BFCEA6E49B for ; Fri, 2 Jun 2017 00:46:06 +0000 (UTC) Received: from orsmga001.jf.intel.com ([10.7.209.18]) by fmsmga104.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 01 Jun 2017 17:46:06 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos; i="5.39,282,1493708400"; d="scan'208"; a="1137121661" Received: from labuser-z97x-ud5h.jf.intel.com ([10.7.199.62]) by orsmga001.jf.intel.com with ESMTP; 01 Jun 2017 17:46:05 -0700 From: Manasi Navare To: intel-gfx@lists.freedesktop.org Date: Thu, 1 Jun 2017 17:51:27 -0700 Message-Id: <1496364687-30660-2-git-send-email-manasi.d.navare@intel.com> X-Mailer: git-send-email 2.1.4 In-Reply-To: <1496364687-30660-1-git-send-email-manasi.d.navare@intel.com> References: <1496364687-30660-1-git-send-email-manasi.d.navare@intel.com> Subject: [Intel-gfx] [PATCH 2/2] drm/i915/dp: Validate the compliance test link parameters X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Virus-Scanned: ClamAV using ClamSMTP Validate the compliance test link parameters when the compliance test dpcd registers are read. Also validate them in compute_config before using them since the max values might have been reduced due to link training fallback. Signed-off-by: Manasi Navare --- drivers/gpu/drm/i915/intel_dp.c | 29 +++++++++++++---------------- 1 file changed, 13 insertions(+), 16 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c index 832786d..cda0f0a 100644 --- a/drivers/gpu/drm/i915/intel_dp.c +++ b/drivers/gpu/drm/i915/intel_dp.c @@ -1678,12 +1678,15 @@ intel_dp_compute_config(struct intel_encoder *encoder, if (intel_dp->compliance.test_type == DP_TEST_LINK_TRAINING) { int index; - index = intel_dp_rate_index(intel_dp->common_rates, - intel_dp->num_common_rates, - intel_dp->compliance.test_link_rate); - if (index >= 0) + /* Validate the compliance test data */ + if (intel_dp_link_params_valid(intel_dp, intel_dp->compliance.test_link_rate, + intel_dp->compliance.test_lane_count)) { + index = intel_dp_rate_index(intel_dp->common_rates, + intel_dp->num_common_rates, + intel_dp->compliance.test_link_rate); min_clock = max_clock = index; - min_lane_count = max_lane_count = intel_dp->compliance.test_lane_count; + min_lane_count = max_lane_count = intel_dp->compliance.test_lane_count; + } } DRM_DEBUG_KMS("DP link computation with max lane count %i " "max bw %d pixel clock %iKHz\n", @@ -3961,8 +3964,7 @@ intel_dp_get_sink_irq_esi(struct intel_dp *intel_dp, u8 *sink_irq_vector) static uint8_t intel_dp_autotest_link_training(struct intel_dp *intel_dp) { int status = 0; - int min_lane_count = 1; - int link_rate_index, test_link_rate; + int test_link_rate; uint8_t test_lane_count, test_link_bw; /* (DP CTS 1.2) * 4.3.1.11 @@ -3976,10 +3978,6 @@ static uint8_t intel_dp_autotest_link_training(struct intel_dp *intel_dp) return DP_TEST_NAK; } test_lane_count &= DP_MAX_LANE_COUNT_MASK; - /* Validate the requested lane count */ - if (test_lane_count < min_lane_count || - test_lane_count > intel_dp->max_link_lane_count) - return DP_TEST_NAK; status = drm_dp_dpcd_readb(&intel_dp->aux, DP_TEST_LINK_RATE, &test_link_bw); @@ -3987,12 +3985,11 @@ static uint8_t intel_dp_autotest_link_training(struct intel_dp *intel_dp) DRM_DEBUG_KMS("Link Rate read failed\n"); return DP_TEST_NAK; } - /* Validate the requested link rate */ test_link_rate = drm_dp_bw_code_to_link_rate(test_link_bw); - link_rate_index = intel_dp_rate_index(intel_dp->common_rates, - intel_dp->num_common_rates, - test_link_rate); - if (link_rate_index < 0) + + /* Validate the requested link rate and lane count */ + if (!intel_dp_link_params_valid(intel_dp, test_link_rate, + test_lane_count)) return DP_TEST_NAK; intel_dp->compliance.test_lane_count = test_lane_count;