diff mbox

[3/8] drm/i915: Set scaler mode for NV12

Message ID 1496832108-32594-4-git-send-email-vidya.srinivas@intel.com (mailing list archive)
State New, archived
Headers show

Commit Message

Vidya Srinivas June 7, 2017, 10:41 a.m. UTC 
From: Chandra Konduru <chandra.konduru@intel.com>

This patch sets appropriate scaler mode for NV12 format.
In this mode, skylake scaler does either chroma-upsampling or
chroma-upsampling and resolution scaling

Link: https://patchwork.kernel.org/patch/6426161/
Signed-off-by: Chandra Konduru <chandra.konduru@intel.com>
Signed-off-by: Nabendu Maiti <nabendu.bikash.maiti@intel.com>
Signed-off-by: Vidya Srinivas <vidya.srinivas@intel.com>
---
 drivers/gpu/drm/i915/i915_reg.h     | 1 +
 drivers/gpu/drm/i915/intel_atomic.c | 6 ++++++
 2 files changed, 7 insertions(+)

Comments

Ville Syrjälä June 12, 2017, 1:56 p.m. UTC | #1 
On Wed, Jun 07, 2017 at 04:11:43PM +0530, Vidya Srinivas wrote:
> From: Chandra Konduru <chandra.konduru@intel.com>
> 
> This patch sets appropriate scaler mode for NV12 format.
> In this mode, skylake scaler does either chroma-upsampling or
> chroma-upsampling and resolution scaling
> 
> Link: https://patchwork.kernel.org/patch/6426161/
> Signed-off-by: Chandra Konduru <chandra.konduru@intel.com>
> Signed-off-by: Nabendu Maiti <nabendu.bikash.maiti@intel.com>
> Signed-off-by: Vidya Srinivas <vidya.srinivas@intel.com>
> ---
>  drivers/gpu/drm/i915/i915_reg.h     | 1 +
>  drivers/gpu/drm/i915/intel_atomic.c | 6 ++++++
>  2 files changed, 7 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index 8990f3a..9d06c8d 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -6190,6 +6190,7 @@ enum {
>  #define PS_SCALER_MODE_MASK (3 << 28)
>  #define PS_SCALER_MODE_DYN  (0 << 28)
>  #define PS_SCALER_MODE_HQ  (1 << 28)
> +#define PS_SCALER_MODE_NV12 (2 << 28)
>  #define PS_PLANE_SEL_MASK  (7 << 25)
>  #define PS_PLANE_SEL(plane) (((plane) + 1) << 25)
>  #define PS_FILTER_MASK         (3 << 23)
> diff --git a/drivers/gpu/drm/i915/intel_atomic.c b/drivers/gpu/drm/i915/intel_atomic.c
> index d791b3e..2fa07bb 100644
> --- a/drivers/gpu/drm/i915/intel_atomic.c
> +++ b/drivers/gpu/drm/i915/intel_atomic.c
> @@ -327,6 +327,12 @@ int intel_atomic_setup_scalers(struct drm_i915_private *dev_priv,
>  		/* set scaler mode */
>  		if (IS_GEMINILAKE(dev_priv)) {
>  			scaler_state->scalers[*scaler_id].mode = 0;

This looks wrong. I would put the NV12 case first as presumably it's
still needed on GLK+?

> +		} else if (plane_state && plane_state->base.fb &&
> +			plane_state->base.fb->format->format ==
> +			DRM_FORMAT_NV12) {
> +			DRM_ERROR("NV12 format setting scaler mode\n");
> +			scaler_state->scalers[*scaler_id].mode =
> +				PS_SCALER_MODE_NV12;
>  		} else if (num_scalers_need == 1 && intel_crtc->pipe != PIPE_C) {
>  			/*
>  			 * when only 1 scaler is in use on either pipe A or B,
> -- 
> 1.9.1
> 
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Vidya Srinivas June 15, 2017, 11:30 a.m. UTC | #2 
> -----Original Message-----
> From: Ville Syrjälä [mailto:ville.syrjala@linux.intel.com]
> Sent: Monday, June 12, 2017 7:27 PM
> To: Srinivas, Vidya <vidya.srinivas@intel.com>
> Cc: intel-gfx@lists.freedesktop.org
> Subject: Re: [Intel-gfx] [PATCH 3/8] drm/i915: Set scaler mode for NV12
> 
> On Wed, Jun 07, 2017 at 04:11:43PM +0530, Vidya Srinivas wrote:
> > From: Chandra Konduru <chandra.konduru@intel.com>
> >
> > This patch sets appropriate scaler mode for NV12 format.
> > In this mode, skylake scaler does either chroma-upsampling or
> > chroma-upsampling and resolution scaling
> >
> > Link: https://patchwork.kernel.org/patch/6426161/
> > Signed-off-by: Chandra Konduru <chandra.konduru@intel.com>
> > Signed-off-by: Nabendu Maiti <nabendu.bikash.maiti@intel.com>
> > Signed-off-by: Vidya Srinivas <vidya.srinivas@intel.com>
> > ---
> >  drivers/gpu/drm/i915/i915_reg.h     | 1 +
> >  drivers/gpu/drm/i915/intel_atomic.c | 6 ++++++
> >  2 files changed, 7 insertions(+)
> >
> > diff --git a/drivers/gpu/drm/i915/i915_reg.h
> > b/drivers/gpu/drm/i915/i915_reg.h index 8990f3a..9d06c8d 100644
> > --- a/drivers/gpu/drm/i915/i915_reg.h
> > +++ b/drivers/gpu/drm/i915/i915_reg.h
> > @@ -6190,6 +6190,7 @@ enum {
> >  #define PS_SCALER_MODE_MASK (3 << 28)  #define
> PS_SCALER_MODE_DYN  (0
> > << 28)  #define PS_SCALER_MODE_HQ  (1 << 28)
> > +#define PS_SCALER_MODE_NV12 (2 << 28)
> >  #define PS_PLANE_SEL_MASK  (7 << 25)
> >  #define PS_PLANE_SEL(plane) (((plane) + 1) << 25)
> >  #define PS_FILTER_MASK         (3 << 23)
> > diff --git a/drivers/gpu/drm/i915/intel_atomic.c
> > b/drivers/gpu/drm/i915/intel_atomic.c
> > index d791b3e..2fa07bb 100644
> > --- a/drivers/gpu/drm/i915/intel_atomic.c
> > +++ b/drivers/gpu/drm/i915/intel_atomic.c
> > @@ -327,6 +327,12 @@ int intel_atomic_setup_scalers(struct
> drm_i915_private *dev_priv,
> >  		/* set scaler mode */
> >  		if (IS_GEMINILAKE(dev_priv)) {
> >  			scaler_state->scalers[*scaler_id].mode = 0;
> 
> This looks wrong. I would put the NV12 case first as presumably it's still
> needed on GLK+?
Thank you. I will make the change and re-submit.

Regards
Vidya
> 
> > +		} else if (plane_state && plane_state->base.fb &&
> > +			plane_state->base.fb->format->format ==
> > +			DRM_FORMAT_NV12) {
> > +			DRM_ERROR("NV12 format setting scaler
> mode\n");
> > +			scaler_state->scalers[*scaler_id].mode =
> > +				PS_SCALER_MODE_NV12;
> >  		} else if (num_scalers_need == 1 && intel_crtc->pipe !=
> PIPE_C) {
> >  			/*
> >  			 * when only 1 scaler is in use on either pipe A or B,
> > --
> > 1.9.1
> >
> > _______________________________________________
> > Intel-gfx mailing list
> > Intel-gfx@lists.freedesktop.org
> > https://lists.freedesktop.org/mailman/listinfo/intel-gfx
> 
> --
> Ville Syrjälä
> Intel OTC
diff mbox

Patch

diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 8990f3a..9d06c8d 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -6190,6 +6190,7 @@  enum {
 #define PS_SCALER_MODE_MASK (3 << 28)
 #define PS_SCALER_MODE_DYN  (0 << 28)
 #define PS_SCALER_MODE_HQ  (1 << 28)
+#define PS_SCALER_MODE_NV12 (2 << 28)
 #define PS_PLANE_SEL_MASK  (7 << 25)
 #define PS_PLANE_SEL(plane) (((plane) + 1) << 25)
 #define PS_FILTER_MASK         (3 << 23)
diff --git a/drivers/gpu/drm/i915/intel_atomic.c b/drivers/gpu/drm/i915/intel_atomic.c
index d791b3e..2fa07bb 100644
--- a/drivers/gpu/drm/i915/intel_atomic.c
+++ b/drivers/gpu/drm/i915/intel_atomic.c
@@ -327,6 +327,12 @@  int intel_atomic_setup_scalers(struct drm_i915_private *dev_priv,
 		/* set scaler mode */
 		if (IS_GEMINILAKE(dev_priv)) {
 			scaler_state->scalers[*scaler_id].mode = 0;
+		} else if (plane_state && plane_state->base.fb &&
+			plane_state->base.fb->format->format ==
+			DRM_FORMAT_NV12) {
+			DRM_ERROR("NV12 format setting scaler mode\n");
+			scaler_state->scalers[*scaler_id].mode =
+				PS_SCALER_MODE_NV12;
 		} else if (num_scalers_need == 1 && intel_crtc->pipe != PIPE_C) {
 			/*
 			 * when only 1 scaler is in use on either pipe A or B,