| Message ID | 1499375184-5725-1-git-send-email-rodrigo.vivi@intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
On 17-07-06 14:06:24, Vivi, Rodrigo wrote: >No change on render context size is required for Gen10. > >So this patch doesn't change the default behaviour, >but only avoid the missing_case message. > >Cc: Ben Widawsky <benjamin.widawsky@intel.com> >Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Reviewed-by: Ben Widawsky <ben@bwidawsk.net> [snip]
patch merged to dinq. thanks for reviewing. On Thu, Jul 6, 2017 at 7:51 PM, Ben Widawsky <benjamin.widawsky@intel.com> wrote: > On 17-07-06 14:06:24, Vivi, Rodrigo wrote: >> >> No change on render context size is required for Gen10. >> >> So this patch doesn't change the default behaviour, >> but only avoid the missing_case message. >> >> Cc: Ben Widawsky <benjamin.widawsky@intel.com> >> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> > > > Reviewed-by: Ben Widawsky <ben@bwidawsk.net> > > [snip] > > > -- > Ben Widawsky, Intel Open Source Technology Center > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Hi, I'm a bit late to the party, but as I already mentioned at [1] the CNL render ctx size is smaller than the gen9 one according to the specs. The ctx format in the specs contains 16752 dwords, i.e. 17 pages, to which we need to add 1 page for the PPHWSP, so 18 pages total. If we re-use the gen9 size we end up wasting 4 pages per lrc. I don't have access to a CNL to test this but I've been told that a setup using 19 pages (1 more for safety) has been tested successfully on CNL. -Daniele [1] https://lists.freedesktop.org/archives/intel-gfx/2017-April/125321.html On 07/07/17 09:38, Rodrigo Vivi wrote: > patch merged to dinq. thanks for reviewing. > > On Thu, Jul 6, 2017 at 7:51 PM, Ben Widawsky > <benjamin.widawsky@intel.com> wrote: >> On 17-07-06 14:06:24, Vivi, Rodrigo wrote: >>> >>> No change on render context size is required for Gen10. >>> >>> So this patch doesn't change the default behaviour, >>> but only avoid the missing_case message. >>> >>> Cc: Ben Widawsky <benjamin.widawsky@intel.com> >>> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> >> >> >> Reviewed-by: Ben Widawsky <ben@bwidawsk.net> >> >> [snip] >> >> >> -- >> Ben Widawsky, Intel Open Source Technology Center >> >> _______________________________________________ >> Intel-gfx mailing list >> Intel-gfx@lists.freedesktop.org >> https://lists.freedesktop.org/mailman/listinfo/intel-gfx > > >
diff --git a/drivers/gpu/drm/i915/intel_engine_cs.c b/drivers/gpu/drm/i915/intel_engine_cs.c index a55cd72..24db316 100644 --- a/drivers/gpu/drm/i915/intel_engine_cs.c +++ b/drivers/gpu/drm/i915/intel_engine_cs.c @@ -149,6 +149,7 @@ struct engine_info { switch (INTEL_GEN(dev_priv)) { default: MISSING_CASE(INTEL_GEN(dev_priv)); + case 10: case 9: return GEN9_LR_CONTEXT_RENDER_SIZE; case 8:
No change on render context size is required for Gen10. So this patch doesn't change the default behaviour, but only avoid the missing_case message. Cc: Ben Widawsky <benjamin.widawsky@intel.com> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> --- drivers/gpu/drm/i915/intel_engine_cs.c | 1 + 1 file changed, 1 insertion(+)